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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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217 } | 217 } |
218 | 218 |
219 void _ori(Variable *Dest, Variable *Src, uint32_t Imm) { | 219 void _ori(Variable *Dest, Variable *Src, uint32_t Imm) { |
220 Context.insert<InstMIPS32Ori>(Dest, Src, Imm); | 220 Context.insert<InstMIPS32Ori>(Dest, Src, Imm); |
221 } | 221 } |
222 | 222 |
223 void _sll(Variable *Dest, Variable *Src, uint32_t Imm) { | 223 void _sll(Variable *Dest, Variable *Src, uint32_t Imm) { |
224 Context.insert<InstMIPS32Sll>(Dest, Src, Imm); | 224 Context.insert<InstMIPS32Sll>(Dest, Src, Imm); |
225 } | 225 } |
226 | 226 |
| 227 void _sllv(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 228 Context.insert<InstMIPS32Sllv>(Dest, Src0, Src1); |
| 229 } |
| 230 |
227 void _slt(Variable *Dest, Variable *Src0, Variable *Src1) { | 231 void _slt(Variable *Dest, Variable *Src0, Variable *Src1) { |
228 Context.insert<InstMIPS32Slt>(Dest, Src0, Src1); | 232 Context.insert<InstMIPS32Slt>(Dest, Src0, Src1); |
229 } | 233 } |
230 | 234 |
231 void _slti(Variable *Dest, Variable *Src, uint32_t Imm) { | 235 void _slti(Variable *Dest, Variable *Src, uint32_t Imm) { |
232 Context.insert<InstMIPS32Slti>(Dest, Src, Imm); | 236 Context.insert<InstMIPS32Slti>(Dest, Src, Imm); |
233 } | 237 } |
234 | 238 |
235 void _sltiu(Variable *Dest, Variable *Src, uint32_t Imm) { | 239 void _sltiu(Variable *Dest, Variable *Src, uint32_t Imm) { |
236 Context.insert<InstMIPS32Sltiu>(Dest, Src, Imm); | 240 Context.insert<InstMIPS32Sltiu>(Dest, Src, Imm); |
237 } | 241 } |
238 | 242 |
239 void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) { | 243 void _sltu(Variable *Dest, Variable *Src0, Variable *Src1) { |
240 Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1); | 244 Context.insert<InstMIPS32Sltu>(Dest, Src0, Src1); |
241 } | 245 } |
242 | 246 |
243 void _sra(Variable *Dest, Variable *Src, uint32_t Imm) { | 247 void _sra(Variable *Dest, Variable *Src, uint32_t Imm) { |
244 Context.insert<InstMIPS32Sra>(Dest, Src, Imm); | 248 Context.insert<InstMIPS32Sra>(Dest, Src, Imm); |
245 } | 249 } |
246 | 250 |
| 251 void _srav(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 252 Context.insert<InstMIPS32Srav>(Dest, Src0, Src1); |
| 253 } |
| 254 |
| 255 void _srl(Variable *Dest, Variable *Src, uint32_t Imm) { |
| 256 Context.insert<InstMIPS32Srl>(Dest, Src, Imm); |
| 257 } |
| 258 |
| 259 void _srlv(Variable *Dest, Variable *Src0, Variable *Src1) { |
| 260 Context.insert<InstMIPS32Srlv>(Dest, Src0, Src1); |
| 261 } |
| 262 |
247 void _sub(Variable *Dest, Variable *Src0, Variable *Src1) { | 263 void _sub(Variable *Dest, Variable *Src0, Variable *Src1) { |
248 Context.insert<InstMIPS32Sub>(Dest, Src0, Src1); | 264 Context.insert<InstMIPS32Sub>(Dest, Src0, Src1); |
249 } | 265 } |
250 | 266 |
251 void _subu(Variable *Dest, Variable *Src0, Variable *Src1) { | 267 void _subu(Variable *Dest, Variable *Src0, Variable *Src1) { |
252 Context.insert<InstMIPS32Subu>(Dest, Src0, Src1); | 268 Context.insert<InstMIPS32Subu>(Dest, Src0, Src1); |
253 } | 269 } |
254 | 270 |
255 void _xor(Variable *Dest, Variable *Src0, Variable *Src1) { | 271 void _xor(Variable *Dest, Variable *Src0, Variable *Src1) { |
256 Context.insert<InstMIPS32Xor>(Dest, Src0, Src1); | 272 Context.insert<InstMIPS32Xor>(Dest, Src0, Src1); |
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404 explicit TargetHeaderMIPS32(GlobalContext *Ctx); | 420 explicit TargetHeaderMIPS32(GlobalContext *Ctx); |
405 | 421 |
406 private: | 422 private: |
407 ~TargetHeaderMIPS32() = default; | 423 ~TargetHeaderMIPS32() = default; |
408 }; | 424 }; |
409 | 425 |
410 } // end of namespace MIPS32 | 426 } // end of namespace MIPS32 |
411 } // end of namespace Ice | 427 } // end of namespace Ice |
412 | 428 |
413 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H | 429 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H |
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