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Unified Diff: src/IceInstMIPS32.cpp

Issue 1975283002: Subzero, MIPS32: Implement logical instructions ashr, lshr, shl (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 7 months ago
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Index: src/IceInstMIPS32.cpp
diff --git a/src/IceInstMIPS32.cpp b/src/IceInstMIPS32.cpp
index 30d48e31403e7a47f4dcc3cc009483bbb5092868..043c2cab9fe9c32f4e9b7b1dcb6444c7c067e57a 100644
--- a/src/IceInstMIPS32.cpp
+++ b/src/IceInstMIPS32.cpp
@@ -67,11 +67,15 @@ template <> const char *InstMIPS32Multu::Opcode = "multu";
template <> const char *InstMIPS32Or::Opcode = "or";
template <> const char *InstMIPS32Ori::Opcode = "ori";
template <> const char *InstMIPS32Sll::Opcode = "sll";
+template <> const char *InstMIPS32Sllv::Opcode = "sllv";
template <> const char *InstMIPS32Slt::Opcode = "slt";
template <> const char *InstMIPS32Slti::Opcode = "slti";
template <> const char *InstMIPS32Sltiu::Opcode = "sltiu";
template <> const char *InstMIPS32Sltu::Opcode = "sltu";
template <> const char *InstMIPS32Sra::Opcode = "sra";
+template <> const char *InstMIPS32Srav::Opcode = "srav";
+template <> const char *InstMIPS32Srl::Opcode = "srl";
+template <> const char *InstMIPS32Srlv::Opcode = "srlv";
template <> const char *InstMIPS32Sub::Opcode = "sub";
template <> const char *InstMIPS32Subu::Opcode = "subu";
template <> const char *InstMIPS32Xor::Opcode = "xor";
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