Add "vmov.<dt> <Qd>, #<imm>" to integrated ARM assembler.

Add "vmov.<dt> <Qd>, #<imm>" to integrated ARM assembler.

Adds the VMOV instruction to the integrated assembler. Because #<imm> is
complex, and we don't currently have a special ARM class to encode
constants defined by ARM method AdvSIMDExpandImm(), it currently only
accepts (nonnegative) integer32 constants that can fit into 8 bits.

There are no tests for this instruction, since there currently no
callers to this instruction. However, John will be checking in a CL
shortly that will use this instruction.

Add example generator for vector add.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=b627f0945fd64e05a1b373e5b6be4bc17e4482ab

[Karl, 2016-04-11 21:26:57]

Description was changed from

==========
Add "vmov.<dt> <Qd>, #<imm>" to integrated ARM assembler.

Adds the VMOV instruction to the integrated assembler. Because #<imm> is
complex, and we don't currently have a special ARM class to encode
constants defined by ARM method AdvSIMDExpandImm(), it currently only
accepts (nonnegative) integer32 constants that can fit into 8 bits.

There are no tests for this instruction, since there currently no
callers to this instruction. However, John will be checking in a CL
shortly that will use this instruction.

Add example generator for vector add.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
==========

to

==========
Add "vmov.<dt> <Qd>, #<imm>" to integrated ARM assembler.

Adds the VMOV instruction to the integrated assembler. Because #<imm> is
complex, and we don't currently have a special ARM class to encode
constants defined by ARM method AdvSIMDExpandImm(), it currently only
accepts (nonnegative) integer32 constants that can fit into 8 bits.

There are no tests for this instruction, since there currently no
callers to this instruction. However, John will be checking in a CL
shortly that will use this instruction.

Add example generator for vector add.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
==========

[Karl, 2016-04-11 21:26:57]

kschimpf@google.com changed reviewers:
+ eholk@chromium.org, jpp@chromium.org, sehr@chromium.org, stichnot@chromium.org

[John, 2016-04-11 21:30:02]

lgtm

[Karl, 2016-04-11 21:32:17]

Description was changed from

==========
Add "vmov.<dt> <Qd>, #<imm>" to integrated ARM assembler.

Adds the VMOV instruction to the integrated assembler. Because #<imm> is
complex, and we don't currently have a special ARM class to encode
constants defined by ARM method AdvSIMDExpandImm(), it currently only
accepts (nonnegative) integer32 constants that can fit into 8 bits.

There are no tests for this instruction, since there currently no
callers to this instruction. However, John will be checking in a CL
shortly that will use this instruction.

Add example generator for vector add.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
==========

to

==========
Add "vmov.<dt> <Qd>, #<imm>" to integrated ARM assembler.

Adds the VMOV instruction to the integrated assembler. Because #<imm> is
complex, and we don't currently have a special ARM class to encode
constants defined by ARM method AdvSIMDExpandImm(), it currently only
accepts (nonnegative) integer32 constants that can fit into 8 bits.

There are no tests for this instruction, since there currently no
callers to this instruction. However, John will be checking in a CL
shortly that will use this instruction.

Add example generator for vector add.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Committed:
https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a...
==========

[Karl, 2016-04-11 21:32:19]

Committed patchset #3 (id:40001) manually as
b627f0945fd64e05a1b373e5b6be4bc17e4482ab (presubmit successful).