Subzero. ARM32. Fixes Insert/Extract v(8|16)i1 bug.

Subzero. ARM32. Fixes Insert/Extract v(8|16)i1 bug.

Subzero emits the following sequence when extracting elements from a
vector of i1:

vmov.8 Rt, Dm[I]

I should be scaled when accessing v4i1, and v8i1, i.e., to extract the
n-th boolean in a v8i1, the emitted code should be

vmov.8 Rt, Dm[I*n]

Insertions are handled by changing the operands' types, so that a
v4i1 is handled as a v4i32, and a v8i1, as a v8i16. I.e., to insert
the n-th boolean into a v8i1, the emitted code should be

mov.16 Dt[I], Rm

instead of

mov.8 Dt[I*n], Rm

This clears the upper bits for that element.

BUG=
R=eholk@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=79568d27913019d5d284cb27c87a8357462bd9e4

[John, 2016-04-11 16:49:03]

jpp@chromium.org changed reviewers:
+ eholk@chromium.org, kschimpf@google.com, sehr@chromium.org,
stichnot@chromium.org

[Eric Holk, 2016-04-11 17:34:57]

https://codereview.chromium.org/1876083004/diff/40001/src/IceInstARM32.cpp
File src/IceInstARM32.cpp (right):

https://codereview.chromium.org/1876083004/diff/40001/src/IceInstARM32.cpp#ne...
src/IceInstARM32.cpp:1271: Src->asType(Func, SrcTy, Src->getRegNum()),
getPredicate());
Are we guaranteed that Src has a registers at this point?

[John, 2016-04-11 18:23:23]

https://codereview.chromium.org/1876083004/diff/40001/src/IceInstARM32.cpp
File src/IceInstARM32.cpp (right):

https://codereview.chromium.org/1876083004/diff/40001/src/IceInstARM32.cpp#ne...
src/IceInstARM32.cpp:1271: Src->asType(Func, SrcTy, Src->getRegNum()),
getPredicate());
On 2016/04/11 17:34:57, Eric Holk wrote:
> Are we guaranteed that Src has a registers at this point?

yes

[Eric Holk, 2016-04-11 18:24:37]

lgtm

[John, 2016-04-11 18:33:37]

Description was changed from

==========
Subzero. ARM32. Fixes Insert/Extract v(8|16)i1 bug.

Subzero emits the following sequence when extracting elements from a
vector of i1:

vmov.8 Rt, Dm[I]

I should be scaled when accessing v4i1, and v8i1, i.e., to extract the
n-th boolean in a v8i1, the emitted code should be

vmov.8 Rt, Dm[I*n]

Insertions are handled by changing the operands' types, so that a
v4i1 is handled as a v4i32, and a v8i1, as a v8i16. I.e., to insert
the n-th boolean into a v8i1, the emitted code should be

mov.16 Dt[I], Rm

instead of

mov.8 Dt[I*n], Rm

This clears the upper bits for that element.

BUG=
==========

to

==========
Subzero. ARM32. Fixes Insert/Extract v(8|16)i1 bug.

Subzero emits the following sequence when extracting elements from a
vector of i1:

vmov.8 Rt, Dm[I]

I should be scaled when accessing v4i1, and v8i1, i.e., to extract the
n-th boolean in a v8i1, the emitted code should be

vmov.8 Rt, Dm[I*n]

Insertions are handled by changing the operands' types, so that a
v4i1 is handled as a v4i32, and a v8i1, as a v8i16. I.e., to insert
the n-th boolean into a v8i1, the emitted code should be

mov.16 Dt[I], Rm

instead of

mov.8 Dt[I*n], Rm

This clears the upper bits for that element.

BUG=
R=eholk@chromium.org

Committed:
https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a...
==========

[John, 2016-04-11 18:33:38]

Committed patchset #3 (id:40001) manually as
79568d27913019d5d284cb27c87a8357462bd9e4 (presubmit successful).