Subzero. ARM32. Fixes Insert/Extract v(8|16)i1 bug.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1090 matching lines @@
     // to help ensure that we picked the right D register.
     //
     // TODO(jpp): find a way to do this that doesn't rely on ordering of the
     // alias list.
     assert(RegARM32::RegTable[SrcEntry.Aliases[2]].Encoding - 1 ==
            RegARM32::RegTable[SrcEntry.Aliases[1]].Encoding);
     return static_cast<Register>(SrcEntry.Aliases[2]);
   }
 }
 
-constexpr uint32_t getDIndex(uint32_t NumElements, uint32_t Index) {
-  return (Index < NumElements / 2) ? Index : Index - (NumElements / 2);
+uint32_t adjustDIndex(Type Ty, uint32_t DIndex) {
+  // If Ty is a vector of i1, we may need to adjust DIndex. This is needed
+  // because, e.g., the second i1 in a v4i1 is accessed with a
+  //
+  // vmov.s8 Qd[4], Rn
+  switch (Ty) {
+  case IceType_v4i1:
+    return DIndex * 4;
+  case IceType_v8i1:
+    return DIndex * 2;
+  case IceType_v16i1:
+    return DIndex;
+  default:
+    return DIndex;
+  }
+}
+
+uint32_t getDIndex(Type Ty, uint32_t NumElements, uint32_t Index) {
+  const uint32_t DIndex =
+      (Index < NumElements / 2) ? Index : Index - (NumElements / 2);
+  return adjustDIndex(Ty, DIndex);
 }
 
 // For floating point values, we can insertelement or extractelement by moving
 // directly from an S register. This function finds the right one.
 Register getSRegister(const Variable *Src, uint32_t Index) {
   assert(Src->hasReg());
   const auto SrcReg = Src->getRegNum();
 
   // For floating point values, we need to be allocated to Q0 - Q7, so we can
   // directly access the value we want as one of the S registers.
@@ skipping 22 matching lines @@
     const uint32_t BitSize = typeWidthInBytes(DestTy) * CHAR_BIT;
     if (BitSize < 32) {
       Str << ".s" << BitSize;
     } else {
       Str << "." << BitSize;
     }
     Str << "\t";
     getDest()->emit(Func);
     Str << ", ";
 
-    const size_t VectorSize = typeNumElements(Src->getType());
+    const Type SrcTy = Src->getType();
+    const size_t VectorSize = typeNumElements(SrcTy);
 
     const Register SrcReg = getDRegister(Src, Index);
 
     Str << RegARM32::RegTable[SrcReg].Name;
-    Str << "[" << getDIndex(VectorSize, Index) << "]";
+    Str << "[" << getDIndex(SrcTy, VectorSize, Index) << "]";
   } else if (isFloatingType(DestTy)) {
     const Register SrcReg = getSRegister(Src, Index);
 
     Str << "\t"
         << "vmov" << getPredicate() << ".f32"
         << "\t";
     getDest()->emit(Func);
     Str << ", " << RegARM32::RegTable[SrcReg].Name;
   } else {
     assert(false && "Invalid extract type");
   }
 }
 
 void InstARM32Extract::emitIAS(const Cfg *Func) const {
   const Operand *Dest = getDest();
   const Type DestTy = Dest->getType();
   const Operand *Src = getSrc(0);
+  const Type SrcTy = Src->getType();
   assert(isVectorType(Src->getType()));
   assert(DestTy == typeElementType(Src->getType()));
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   if (isIntegerType(DestTy)) {
-    Asm->vmovrqi(Dest, Src, Index, getPredicate());
+    Asm->vmovrqi(Dest, Src, adjustDIndex(SrcTy, Index), getPredicate());
     assert(!Asm->needsTextFixup());
     return;
   }
   assert(isFloatingType(DestTy));
   Asm->vmovsqi(Dest, Src, Index, getPredicate());
   assert(!Asm->needsTextFixup());
 }
 
+namespace {
+Type insertionType(Type Ty) {
+  assert(isVectorType(Ty));
+  switch (Ty) {
+  case IceType_v4i1:
+    return IceType_v4i32;
+  case IceType_v8i1:
+    return IceType_v8i16;
+  case IceType_v16i1:
+    return IceType_v16i8;
+  default:
+    return Ty;
+  }
+}
+} // end of anonymous namespace
+
 void InstARM32Insert::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   const Variable *Dest = getDest();
-  const Type DestTy = getDest()->getType();
-
   const auto *Src = llvm::cast<Variable>(getSrc(0));
+  const Type DestTy = insertionType(getDest()->getType());
+  assert(isVectorType(DestTy));
 
   if (isIntegerType(DestTy)) {
     Str << "\t"
         << "vmov" << getPredicate();
     const size_t BitSize = typeWidthInBytes(typeElementType(DestTy)) * CHAR_BIT;
     Str << "." << BitSize << "\t";
 
     const size_t VectorSize = typeNumElements(DestTy);
     const Register DestReg = getDRegister(Dest, Index);
-    const uint32_t Index = getDIndex(VectorSize, this->Index);
+    const uint32_t Index =
+        getDIndex(insertionType(DestTy), VectorSize, this->Index);
     Str << RegARM32::RegTable[DestReg].Name;
     Str << "[" << Index << "], ";
     Src->emit(Func);
   } else if (isFloatingType(DestTy)) {
     Str << "\t"
         << "vmov" << getPredicate() << ".f32"
         << "\t";
     const Register DestReg = getSRegister(Dest, Index);
     Str << RegARM32::RegTable[DestReg].Name << ", ";
     Src->emit(Func);
   } else {
     assert(false && "Invalid insert type");
   }
 }
 
 void InstARM32Insert::emitIAS(const Cfg *Func) const {
   const Variable *Dest = getDest();
-  const Operand *Src = getSrc(0);
-  const Type SrcTy = Src->getType();
-  assert(isVectorType(Dest->getType()));
-  assert(typeElementType(Dest->getType()) == SrcTy);
+  const auto *Src = llvm::cast<Variable>(getSrc(0));
+  const Type DestTy = insertionType(Dest->getType());
+  const Type SrcTy = typeElementType(DestTy);
+  assert(SrcTy == Src->getType() || Src->getType() == IceType_i1);
+  assert(isVectorType(DestTy));
   auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
   if (isIntegerType(SrcTy)) {
-    const Operand *Src = getSrc(0);
-    Asm->vmovqir(Dest, Index, Src, getPredicate());
+    Asm->vmovqir(Dest->asType(Func, DestTy, Dest->getRegNum()),
+                 adjustDIndex(DestTy, Index),
+                 Src->asType(Func, SrcTy, Src->getRegNum()), getPredicate());

[Eric Holk, 2016/04/11 17:34:57]

Are we guaranteed that Src has a registers at this point?

[John, 2016/04/11 18:23:23]

yes

     assert(!Asm->needsTextFixup());
     return;
   }
   assert(isFloatingType(SrcTy));
   Asm->vmovqis(Dest, Index, Src, getPredicate());
   assert(!Asm->needsTextFixup());
 }
 
 template <InstARM32::InstKindARM32 K>
 void InstARM32CmpLike<K>::emitIAS(const Cfg *Func) const {
@@ skipping 1545 matching lines @@
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmn>;
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace ARM32
 } // end of namespace Ice