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Issue
1819383002:
MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. (Closed)
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Created:
4 years, 9 months ago by Marija Antic Modified:
4 years, 8 months ago Reviewers:
ivica.bogosavljevic, ilija.pavlovic, Michael Achenbach, balazs.kilvady, miran.karic, ahaas, palfia, titzer, gergely.kis, akos.palfi.imgtec CC:
ahaas, v8-reviews_googlegroups.com Base URL:
https://chromium.googlesource.com/v8/v8.git@master Target Ref:
refs/pending/heads/master Project:
v8 Visibility:
Public. |
DescriptionMIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub.
Implementation of turbofan operators Word32PairShl, Word32PairShr,
Word32PairSar, Int32AddPair and Int32SubPair for MIPS.
Port of:
https://codereview.chromium.org/1765973002/
https://codereview.chromium.org/1778893004/
https://codereview.chromium.org/1778493004/
https://codereview.chromium.org/1778893005/
https://codereview.chromium.org/1842013002/
Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc.
BUG=
Committed: https://crrev.com/4b86e6e3219dcd58285e4cad144e3ec87b0ee701
Cr-Commit-Position: refs/heads/master@{#35307}
Patch Set 1 #Patch Set 2 : Fix for arithmetic right shift #
Total comments: 11
Patch Set 3 : Move ShlPair, ShrPair and SarPair to macro-assembler-mips.cc #Patch Set 4 : Fix typo #Patch Set 5 : Rebase #
Total comments: 7
Patch Set 6 : Move Add/SubPair to MacroAsm and refactor instruction-selector-mips #Patch Set 7 : Disable Int32MulPair tests for MIPS #Patch Set 8 : Enable all lowering tests #
Total comments: 6
Patch Set 9 : Rebase #Patch Set 10 : Refactor instruction selector for binary pair ops #Patch Set 11 : Fix shift for shift values larger than 63 #Patch Set 12 : Fix shift values larger than 63 according to changed tests #Patch Set 13 : Rebase #
Messages
Total messages: 72 (29 generated)
Description was changed from ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ========== to ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ==========
https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:844: __ li(kScratchReg, 0x20); Using Operand(32) in the above 2 Branches causes 2 li(at, 32) ops li(kScratchReg, 0x20) is the 3rd. So I would use one li(): _ li(kScratchReg, 32); _ Branch(&less_than_32, lt, i.InputRegister(2), Operand(kScratchReg)); _ Branch(&word_shift, eq, i.InputRegister(2), Operand(kScratchReg)); Same for all the copy-pasted variants.
akos.palfi@imgtec.com changed reviewers: + akos.palfi@imgtec.com
Looks good, added my comments. https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:834: if (instr->InputAt(2)->IsRegister()) { Please move this code into the macro-assembler. For example, for the register version, you could create a new method, something like this: void MacroAssembler::ShlPair(Register dst_low, Register dst_high, Register src_low, Register src_high, Register shift); And for the immediate: void MacroAssembler::ShlPair(Register dst_low, Register dst_high, Register src_low, Register src_high, uint32_t shift); https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:901: if (instr->InputAt(2)->IsRegister()) { Same here, please move to the macro-asm. https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:969: if (instr->InputAt(2)->IsRegister()) { Same here, please move to the macro-asm. https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:1126: // Check for lower word overflow Instead of manual overflow checking here, can you use the AddBranchOvf() macro? https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:1140: // Check for lower word underflow Same question here with SubBranchOvf().
https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:834: if (instr->InputAt(2)->IsRegister()) { On 2016/03/24 12:10:19, akos.palfi.imgtec wrote: > Please move this code into the macro-assembler. > > For example, for the register version, you could create a new method, something > like this: > void MacroAssembler::ShlPair(Register dst_low, Register dst_high, Register > src_low, Register src_high, Register shift); > > And for the immediate: > void MacroAssembler::ShlPair(Register dst_low, Register dst_high, Register > src_low, Register src_high, uint32_t shift); Done. https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:844: __ li(kScratchReg, 0x20); On 2016/03/24 11:52:46, balazs.kilvady wrote: > Using Operand(32) in the above 2 Branches causes 2 li(at, 32) ops > li(kScratchReg, 0x20) is the 3rd. So I would use one li(): > > _ li(kScratchReg, 32); > _ Branch(&less_than_32, lt, i.InputRegister(2), Operand(kScratchReg)); > _ Branch(&word_shift, eq, i.InputRegister(2), Operand(kScratchReg)); > > Same for all the copy-pasted variants. Done. https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:901: if (instr->InputAt(2)->IsRegister()) { On 2016/03/24 12:10:19, akos.palfi.imgtec wrote: > Same here, please move to the macro-asm. Done. https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:969: if (instr->InputAt(2)->IsRegister()) { On 2016/03/24 12:10:19, akos.palfi.imgtec wrote: > Same here, please move to the macro-asm. Done.
Looks good. Please put a '.' at the end of the 1st sentence in the description. If it passes test then OK for me.
https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/20001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:1126: // Check for lower word overflow Simple switching to AddBranchOvf() causes test failures. Investigating this currently. On 2016/03/24 12:10:19, akos.palfi.imgtec wrote: > Instead of manual overflow checking here, can you use the AddBranchOvf() macro?
Description was changed from ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ========== to ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ==========
Fixed the typo in ShrPair, tests are passing.
Rebase
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/80001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/80001
The CQ bit was unchecked by commit-bot@chromium.org
The CQ bit was unchecked by marija.antic@imgtec.com
Dry run: No L-G-T-M from a valid reviewer yet. CQ run can only be started by full committers or once the patch has received an L-G-T-M from a full committer. Even if an L-G-T-M may have been provided, it was from a non-committer, _not_ a full super star committer. Committers are members of the group "project-v8-committers". Note that this has nothing to do with OWNERS files.
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/80001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/80001
The CQ bit was unchecked by commit-bot@chromium.org
Dry run: No L-G-T-M from a valid reviewer yet. CQ run can only be started by full committers or once the patch has received an L-G-T-M from a full committer. Even if an L-G-T-M may have been provided, it was from a non-committer, _not_ a full super star committer. Committers are members of the group "project-v8-committers". Note that this has nothing to do with OWNERS files.
LGTM
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/80001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/80001
Still no dot at the end of the 1st sentence of the description. :) https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:947: case kMipsAddPair: { I would add AddPair and SubPair to MacroAssembler like at the previous shiftPair ops. On ARM they don't need a MacroAssembler function as they have add(); adc() pair. https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:952: // Check for lower word overflow What about the AddBranchOvf() usage? You said earlier you are working on that. I think if there are errors with AddBranchOvf then we have to fix that instruction instead of avoid using it. In that case please let me know the details.
On 2016/03/30 11:52:53, balazs.kilvady wrote: > Still no dot at the end of the 1st sentence of the description. :) > > https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... > File src/compiler/mips/code-generator-mips.cc (right): > > https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... > src/compiler/mips/code-generator-mips.cc:947: case kMipsAddPair: { > I would add AddPair and SubPair to MacroAssembler like at the previous shiftPair > ops. On ARM they don't need a MacroAssembler function as they have add(); adc() > pair. > > https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... > src/compiler/mips/code-generator-mips.cc:952: // Check for lower word overflow > What about the AddBranchOvf() usage? You said earlier you are working on that. I > think if there are errors with AddBranchOvf then we have to fix that instruction > instead of avoid using it. In that case please let me know the details. Did change the description, but not the title. Now the title has the dot also. :)
https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:952: // Check for lower word overflow On 2016/03/30 11:52:52, balazs.kilvady wrote: > What about the AddBranchOvf() usage? You said earlier you are working on that. I > think if there are errors with AddBranchOvf then we have to fix that instruction > instead of avoid using it. In that case please let me know the details. We discussed offline that the AddBranchOvf wrongly detects the overflow and I suggested that we should land the CL without AddBranchOvf for now and we can investigate that issue later.
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Dry run: This issue passed the CQ dry run.
The CQ bit was checked by marija.antic@imgtec.com
CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/80001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/80001
The CQ bit was unchecked by commit-bot@chromium.org
Try jobs failed on following builders: v8_presubmit on tryserver.v8 (JOB_FAILED, http://build.chromium.org/p/tryserver.v8/builders/v8_presubmit/builds/12997)
marija.antic@imgtec.com changed reviewers: + titzer@chromium.org
https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:952: // Check for lower word overflow Issue 283 is opened for the problems with AddBranchOvf and SubBranchOvf. On 2016/03/30 11:52:52, balazs.kilvady wrote: > What about the AddBranchOvf() usage? You said earlier you are working on that. I > think if there are errors with AddBranchOvf then we have to fix that instruction > instead of avoid using it. In that case please let me know the details.
akos.palfi@imgtec.com changed reviewers: + ahaas@chromium.org
@Ben, @Andreas: Could you guys PTAL at the cctest modifications?
https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:967: __ Sltu(kScratchReg, i.InputRegister(0), i.OutputRegister(0)); I think this comparison is not sufficient. I think it would be better if you compare i.InputRegister(0) with i.InputRegister(2) here.
Description was changed from ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ========== to ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ https://codereview.chromium.org/1842013002/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ==========
https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... File src/compiler/mips/code-generator-mips.cc (right): https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:947: case kMipsAddPair: { On 2016/03/30 11:52:52, balazs.kilvady wrote: > I would add AddPair and SubPair to MacroAssembler like at the previous shiftPair > ops. On ARM they don't need a MacroAssembler function as they have add(); adc() > pair. Done. https://codereview.chromium.org/1819383002/diff/80001/src/compiler/mips/code-... src/compiler/mips/code-generator-mips.cc:967: __ Sltu(kScratchReg, i.InputRegister(0), i.OutputRegister(0)); On 2016/03/30 13:32:47, ahaas wrote: > I think this comparison is not sufficient. I think it would be better if you > compare i.InputRegister(0) with i.InputRegister(2) here. Done.
Refactored instruction-selector-mips.cc according to https://codereview.chromium.org/1842013002/
Enabling Int32MulPair tests also, as the operator is implemented by https://codereview.chromium.org/1848253002/
lgtm
Looks very good, I added small nits. https://codereview.chromium.org/1819383002/diff/140001/src/compiler/mips/inst... File src/compiler/mips/instruction-selector-mips.cc (right): https://codereview.chromium.org/1819383002/diff/140001/src/compiler/mips/inst... src/compiler/mips/instruction-selector-mips.cc:426: } I like the VisitWord32PairShift() refactoring below. Could you do something similar for PairAdd and PairSub? Like using a VisitWord32<GoodName>Pair() helper for the common bodies, where GoodName is up to you :) Maybe Op? https://codereview.chromium.org/1819383002/diff/140001/src/mips/macro-assembl... File src/mips/macro-assembler-mips.cc (right): https://codereview.chromium.org/1819383002/diff/140001/src/mips/macro-assembl... src/mips/macro-assembler-mips.cc:1339: // Check for lower word overflow Could you put the 'unsigned' word in the above comment before 'overflow'? That is the main point at here (at least for me :) ) https://codereview.chromium.org/1819383002/diff/140001/src/mips/macro-assembl... src/mips/macro-assembler-mips.cc:1357: // Check for lower word underflow Could you put the 'unsigned' word in the above comment before 'underflow'? That is the main point at here (at least for me :) )
Rebase and address additional comments. https://codereview.chromium.org/1819383002/diff/140001/src/compiler/mips/inst... File src/compiler/mips/instruction-selector-mips.cc (right): https://codereview.chromium.org/1819383002/diff/140001/src/compiler/mips/inst... src/compiler/mips/instruction-selector-mips.cc:426: } On 2016/04/05 11:13:16, balazs.kilvady wrote: > I like the VisitWord32PairShift() refactoring below. Could you do something > similar for PairAdd and PairSub? Like using a VisitWord32<GoodName>Pair() helper > for the common bodies, where GoodName is up to you :) Maybe Op? Done. https://codereview.chromium.org/1819383002/diff/140001/src/mips/macro-assembl... File src/mips/macro-assembler-mips.cc (right): https://codereview.chromium.org/1819383002/diff/140001/src/mips/macro-assembl... src/mips/macro-assembler-mips.cc:1339: // Check for lower word overflow On 2016/04/05 11:13:16, balazs.kilvady wrote: > Could you put the 'unsigned' word in the above comment before 'overflow'? That > is the main point at here (at least for me :) ) Done. https://codereview.chromium.org/1819383002/diff/140001/src/mips/macro-assembl... src/mips/macro-assembler-mips.cc:1357: // Check for lower word underflow On 2016/04/05 11:13:16, balazs.kilvady wrote: > Could you put the 'unsigned' word in the above comment before 'underflow'? That > is the main point at here (at least for me :) ) Done.
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/180001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/180001
The CQ bit was unchecked by commit-bot@chromium.org
Dry run: This issue passed the CQ dry run.
LGTM
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/200001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/200001
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/220001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/220001
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Dry run: Try jobs failed on following builders: v8_linux64_rel_ng on tryserver.v8 (JOB_FAILED, http://build.chromium.org/p/tryserver.v8/builders/v8_linux64_rel_ng/builds/3881)
The CQ bit was checked by machenbach@chromium.org to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/220001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/220001
The CQ bit was unchecked by commit-bot@chromium.org
Dry run: Try jobs failed on following builders: v8_linux64_avx2_rel on tryserver.v8 (JOB_FAILED, http://build.chromium.org/p/tryserver.v8/builders/v8_linux64_avx2_rel/builds/...) v8_linux_arm64_rel on tryserver.v8 (JOB_FAILED, http://build.chromium.org/p/tryserver.v8/builders/v8_linux_arm64_rel/builds/1...) v8_linux_arm_rel on tryserver.v8 (JOB_FAILED, http://build.chromium.org/p/tryserver.v8/builders/v8_linux_arm_rel/builds/16296)
The CQ bit was checked by marija.antic@imgtec.com to run a CQ dry run
Dry run: CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/230001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/230001
The CQ bit was unchecked by commit-bot@chromium.org
Dry run: This issue passed the CQ dry run.
The CQ bit was checked by marija.antic@imgtec.com
The patchset sent to the CQ was uploaded after l-g-t-m from akos.palfi@imgtec.com, titzer@chromium.org, balazs.kilvady@imgtec.com Link to the patchset: https://codereview.chromium.org/1819383002/#ps230001 (title: "Rebase")
CQ is trying da patch. Follow status at https://chromium-cq-status.appspot.com/patch-status/1819383002/230001 View timeline at https://chromium-cq-status.appspot.com/patch-timeline/1819383002/230001
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Description was changed from ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ https://codereview.chromium.org/1842013002/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ========== to ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ https://codereview.chromium.org/1842013002/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ==========
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Committed patchset #13 (id:230001)
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Description was changed from ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ https://codereview.chromium.org/1842013002/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= ========== to ========== MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. Implementation of turbofan operators Word32PairShl, Word32PairShr, Word32PairSar, Int32AddPair and Int32SubPair for MIPS. Port of: https://codereview.chromium.org/1765973002/ https://codereview.chromium.org/1778893004/ https://codereview.chromium.org/1778493004/ https://codereview.chromium.org/1778893005/ https://codereview.chromium.org/1842013002/ Added tests for Word32PairShr and Word32PairSar in test-run-machops.cc. BUG= Committed: https://crrev.com/4b86e6e3219dcd58285e4cad144e3ec87b0ee701 Cr-Commit-Position: refs/heads/master@{#35307} ==========
Message was sent while issue was closed.
Patchset 13 (id:??) landed as https://crrev.com/4b86e6e3219dcd58285e4cad144e3ec87b0ee701 Cr-Commit-Position: refs/heads/master@{#35307} |
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