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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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388 } | 388 } |
389 } | 389 } |
390 VisitRRO(this, kMipsShr, node); | 390 VisitRRO(this, kMipsShr, node); |
391 } | 391 } |
392 | 392 |
393 | 393 |
394 void InstructionSelector::VisitWord32Sar(Node* node) { | 394 void InstructionSelector::VisitWord32Sar(Node* node) { |
395 VisitRRO(this, kMipsSar, node); | 395 VisitRRO(this, kMipsSar, node); |
396 } | 396 } |
397 | 397 |
398 void InstructionSelector::VisitInt32PairAdd(Node* node) { UNIMPLEMENTED(); } | 398 static void VisitInt32PairBinop(InstructionSelector* selector, |
| 399 InstructionCode opcode, Node* node) { |
| 400 MipsOperandGenerator g(selector); |
399 | 401 |
400 void InstructionSelector::VisitInt32PairSub(Node* node) { UNIMPLEMENTED(); } | 402 // We use UseUniqueRegister here to avoid register sharing with the output |
401 | 403 // register. |
402 void InstructionSelector::VisitInt32PairMul(Node* node) { | |
403 MipsOperandGenerator g(this); | |
404 InstructionOperand inputs[] = {g.UseUniqueRegister(node->InputAt(0)), | 404 InstructionOperand inputs[] = {g.UseUniqueRegister(node->InputAt(0)), |
405 g.UseUniqueRegister(node->InputAt(1)), | 405 g.UseUniqueRegister(node->InputAt(1)), |
406 g.UseUniqueRegister(node->InputAt(2)), | 406 g.UseUniqueRegister(node->InputAt(2)), |
407 g.UseUniqueRegister(node->InputAt(3))}; | 407 g.UseUniqueRegister(node->InputAt(3))}; |
| 408 |
408 InstructionOperand outputs[] = { | 409 InstructionOperand outputs[] = { |
409 g.DefineAsRegister(node), | 410 g.DefineAsRegister(node), |
410 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; | 411 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; |
411 Emit(kMipsMulPair, 2, outputs, 4, inputs); | 412 selector->Emit(opcode, 2, outputs, 4, inputs); |
412 } | 413 } |
413 | 414 |
414 void InstructionSelector::VisitWord32PairShl(Node* node) { UNIMPLEMENTED(); } | 415 void InstructionSelector::VisitInt32PairAdd(Node* node) { |
| 416 VisitInt32PairBinop(this, kMipsAddPair, node); |
| 417 } |
415 | 418 |
416 void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); } | 419 void InstructionSelector::VisitInt32PairSub(Node* node) { |
| 420 VisitInt32PairBinop(this, kMipsSubPair, node); |
| 421 } |
417 | 422 |
418 void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); } | 423 void InstructionSelector::VisitInt32PairMul(Node* node) { |
| 424 VisitInt32PairBinop(this, kMipsMulPair, node); |
| 425 } |
| 426 |
| 427 // Shared routine for multiple shift operations. |
| 428 static void VisitWord32PairShift(InstructionSelector* selector, |
| 429 InstructionCode opcode, Node* node) { |
| 430 MipsOperandGenerator g(selector); |
| 431 Int32Matcher m(node->InputAt(2)); |
| 432 InstructionOperand shift_operand; |
| 433 if (m.HasValue()) { |
| 434 shift_operand = g.UseImmediate(m.node()); |
| 435 } else { |
| 436 shift_operand = g.UseUniqueRegister(m.node()); |
| 437 } |
| 438 |
| 439 // We use UseUniqueRegister here to avoid register sharing with the output |
| 440 // register. |
| 441 InstructionOperand inputs[] = {g.UseUniqueRegister(node->InputAt(0)), |
| 442 g.UseUniqueRegister(node->InputAt(1)), |
| 443 shift_operand}; |
| 444 |
| 445 InstructionOperand outputs[] = { |
| 446 g.DefineAsRegister(node), |
| 447 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; |
| 448 |
| 449 selector->Emit(opcode, 2, outputs, 3, inputs); |
| 450 } |
| 451 |
| 452 void InstructionSelector::VisitWord32PairShl(Node* node) { |
| 453 VisitWord32PairShift(this, kMipsShlPair, node); |
| 454 } |
| 455 |
| 456 void InstructionSelector::VisitWord32PairShr(Node* node) { |
| 457 VisitWord32PairShift(this, kMipsShrPair, node); |
| 458 } |
| 459 |
| 460 void InstructionSelector::VisitWord32PairSar(Node* node) { |
| 461 VisitWord32PairShift(this, kMipsSarPair, node); |
| 462 } |
419 | 463 |
420 void InstructionSelector::VisitWord32Ror(Node* node) { | 464 void InstructionSelector::VisitWord32Ror(Node* node) { |
421 VisitRRO(this, kMipsRor, node); | 465 VisitRRO(this, kMipsRor, node); |
422 } | 466 } |
423 | 467 |
424 | 468 |
425 void InstructionSelector::VisitWord32Clz(Node* node) { | 469 void InstructionSelector::VisitWord32Clz(Node* node) { |
426 VisitRR(this, kMipsClz, node); | 470 VisitRR(this, kMipsClz, node); |
427 } | 471 } |
428 | 472 |
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992 : g.UseRegister(length) | 1036 : g.UseRegister(length) |
993 : g.UseRegister(length); | 1037 : g.UseRegister(length); |
994 | 1038 |
995 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), | 1039 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), |
996 offset_operand, length_operand, g.UseRegister(value), | 1040 offset_operand, length_operand, g.UseRegister(value), |
997 g.UseRegister(buffer)); | 1041 g.UseRegister(buffer)); |
998 } | 1042 } |
999 | 1043 |
1000 | 1044 |
1001 namespace { | 1045 namespace { |
1002 | |
1003 // Shared routine for multiple compare operations. | 1046 // Shared routine for multiple compare operations. |
1004 static void VisitCompare(InstructionSelector* selector, InstructionCode opcode, | 1047 static void VisitCompare(InstructionSelector* selector, InstructionCode opcode, |
1005 InstructionOperand left, InstructionOperand right, | 1048 InstructionOperand left, InstructionOperand right, |
1006 FlagsContinuation* cont) { | 1049 FlagsContinuation* cont) { |
1007 MipsOperandGenerator g(selector); | 1050 MipsOperandGenerator g(selector); |
1008 opcode = cont->Encode(opcode); | 1051 opcode = cont->Encode(opcode); |
1009 if (cont->IsBranch()) { | 1052 if (cont->IsBranch()) { |
1010 selector->Emit(opcode, g.NoOutput(), left, right, | 1053 selector->Emit(opcode, g.NoOutput(), left, right, |
1011 g.Label(cont->true_block()), g.Label(cont->false_block())); | 1054 g.Label(cont->true_block()), g.Label(cont->false_block())); |
1012 } else if (cont->IsDeoptimize()) { | 1055 } else if (cont->IsDeoptimize()) { |
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1411 MachineOperatorBuilder::kFloat32Max | | 1454 MachineOperatorBuilder::kFloat32Max | |
1412 MachineOperatorBuilder::kFloat32RoundDown | | 1455 MachineOperatorBuilder::kFloat32RoundDown | |
1413 MachineOperatorBuilder::kFloat32RoundUp | | 1456 MachineOperatorBuilder::kFloat32RoundUp | |
1414 MachineOperatorBuilder::kFloat32RoundTruncate | | 1457 MachineOperatorBuilder::kFloat32RoundTruncate | |
1415 MachineOperatorBuilder::kFloat32RoundTiesEven; | 1458 MachineOperatorBuilder::kFloat32RoundTiesEven; |
1416 } | 1459 } |
1417 | 1460 |
1418 } // namespace compiler | 1461 } // namespace compiler |
1419 } // namespace internal | 1462 } // namespace internal |
1420 } // namespace v8 | 1463 } // namespace v8 |
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