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Issue 1819383002: MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 821 matching lines...) Expand 10 before | Expand all | Expand 10 after
832 } 832 }
833 break; 833 break;
834 case kMipsSar: 834 case kMipsSar:
835 if (instr->InputAt(1)->IsRegister()) { 835 if (instr->InputAt(1)->IsRegister()) {
836 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); 836 __ srav(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1));
837 } else { 837 } else {
838 int32_t imm = i.InputOperand(1).immediate(); 838 int32_t imm = i.InputOperand(1).immediate();
839 __ sra(i.OutputRegister(), i.InputRegister(0), imm); 839 __ sra(i.OutputRegister(), i.InputRegister(0), imm);
840 } 840 }
841 break; 841 break;
842 case kMipsShlPair: {
843 if (instr->InputAt(2)->IsRegister()) {
844 __ ShlPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
845 i.InputRegister(1), i.InputRegister(2));
846 } else {
847 uint32_t imm = i.InputOperand(2).immediate();
848 __ ShlPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
849 i.InputRegister(1), imm);
850 }
851 } break;
852 case kMipsShrPair: {
853 if (instr->InputAt(2)->IsRegister()) {
854 __ ShrPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
855 i.InputRegister(1), i.InputRegister(2));
856 } else {
857 uint32_t imm = i.InputOperand(2).immediate();
858 __ ShrPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
859 i.InputRegister(1), imm);
860 }
861 } break;
862 case kMipsSarPair: {
863 if (instr->InputAt(2)->IsRegister()) {
864 __ SarPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
865 i.InputRegister(1), i.InputRegister(2));
866 } else {
867 uint32_t imm = i.InputOperand(2).immediate();
868 __ SarPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
869 i.InputRegister(1), imm);
870 }
871 } break;
842 case kMipsExt: 872 case kMipsExt:
843 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), 873 __ Ext(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
844 i.InputInt8(2)); 874 i.InputInt8(2));
845 break; 875 break;
846 case kMipsIns: 876 case kMipsIns:
847 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) { 877 if (instr->InputAt(1)->IsImmediate() && i.InputInt8(1) == 0) {
848 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2)); 878 __ Ins(i.OutputRegister(), zero_reg, i.InputInt8(1), i.InputInt8(2));
849 } else { 879 } else {
850 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1), 880 __ Ins(i.OutputRegister(), i.InputRegister(0), i.InputInt8(1),
851 i.InputInt8(2)); 881 i.InputInt8(2));
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
916 __ max_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 946 __ max_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
917 i.InputDoubleRegister(1)); 947 i.InputDoubleRegister(1));
918 break; 948 break;
919 case kMipsMinS: 949 case kMipsMinS:
920 __ min_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0), 950 __ min_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
921 i.InputDoubleRegister(1)); 951 i.InputDoubleRegister(1));
922 break; 952 break;
923 case kMipsCmpD: 953 case kMipsCmpD:
924 // Psuedo-instruction used for FP cmp/branch. No opcode emitted here. 954 // Psuedo-instruction used for FP cmp/branch. No opcode emitted here.
925 break; 955 break;
956 case kMipsAddPair:
957 __ AddPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
958 i.InputRegister(1), i.InputRegister(2), i.InputRegister(3));
959 break;
960 case kMipsSubPair:
961 __ SubPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
962 i.InputRegister(1), i.InputRegister(2), i.InputRegister(3));
963 break;
926 case kMipsMulPair: { 964 case kMipsMulPair: {
927 __ Mulu(i.OutputRegister(1), i.OutputRegister(0), i.InputRegister(0), 965 __ Mulu(i.OutputRegister(1), i.OutputRegister(0), i.InputRegister(0),
928 i.InputRegister(2)); 966 i.InputRegister(2));
929 __ mul(kScratchReg, i.InputRegister(0), i.InputRegister(3)); 967 __ mul(kScratchReg, i.InputRegister(0), i.InputRegister(3));
930 __ mul(kScratchReg2, i.InputRegister(1), i.InputRegister(2)); 968 __ mul(kScratchReg2, i.InputRegister(1), i.InputRegister(2));
931 __ Addu(i.OutputRegister(1), i.OutputRegister(1), kScratchReg); 969 __ Addu(i.OutputRegister(1), i.OutputRegister(1), kScratchReg);
932 __ Addu(i.OutputRegister(1), i.OutputRegister(1), kScratchReg2); 970 __ Addu(i.OutputRegister(1), i.OutputRegister(1), kScratchReg2);
933 } break; 971 } break;
934 case kMipsAddD: 972 case kMipsAddD:
935 // TODO(plind): add special case: combine mult & add. 973 // TODO(plind): add special case: combine mult & add.
(...skipping 941 matching lines...) Expand 10 before | Expand all | Expand 10 after
1877 padding_size -= v8::internal::Assembler::kInstrSize; 1915 padding_size -= v8::internal::Assembler::kInstrSize;
1878 } 1916 }
1879 } 1917 }
1880 } 1918 }
1881 1919
1882 #undef __ 1920 #undef __
1883 1921
1884 } // namespace compiler 1922 } // namespace compiler
1885 } // namespace internal 1923 } // namespace internal
1886 } // namespace v8 1924 } // namespace v8
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