MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=

Committed: https://crrev.com/21733b6b5259799ff4042db58473f986fe2e4a43
Cr-Commit-Position: refs/heads/master@{#35071}

[miran.karic, 2016-03-18 10:11:27]

Description was changed from

==========
MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=
==========

to

==========
MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=
==========

[miran.karic, 2016-03-18 10:11:27]

miran.karic@imgtec.com changed reviewers:
+ akos.palfi@imgtec.com, balazs.kilvady@imgtec.com, ilija.pavlovic@imgtec.com,
ivica.bogosavljevic@imgtec.com, marija.antic@imgtec.com

[ivica.bogosavljevic, 2016-03-21 15:30:48]

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
File src/full-codegen/mips/full-codegen-mips.cc (right):

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
src/full-codegen/mips/full-codegen-mips.cc:4152: branch_address = pc - 5 *
kInstrSize;
Instead of 5 and 6, is it possible to have here named constants which have
different values for different architectures? 5 and 6 or 3 or 4 doesn't mean
much.
In that case, there wouldn't be these branching depending on architecutre

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
src/full-codegen/mips/full-codegen-mips.cc:4184: pc_immediate_load_address = pc
- 3 * kInstrSize;
Same as above

[miran.karic, 2016-03-23 14:41:49]

I agree it would be better to use a constant but I think it is more appropriate
to do that in another CL.

[balazs.kilvady, 2016-03-24 12:12:48]

Why do you think that constants should go to an other CL?

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
File src/full-codegen/mips/full-codegen-mips.cc (right):

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
src/full-codegen/mips/full-codegen-mips.cc:4152: branch_address = pc - 5 *
kInstrSize;
On 2016/03/21 15:30:48, ivica.bogosavljevic wrote:
> Instead of 5 and 6, is it possible to have here named constants which have
> different values for different architectures? 5 and 6 or 3 or 4 doesn't mean
> much.
> In that case, there wouldn't be these branching depending on architecutre

Could kCallTargetAddressOffset and other constants from assembler-mips.h be used
here? They are already arch-specific.

[miran.karic, 2016-03-24 15:34:02]

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
File src/full-codegen/mips/full-codegen-mips.cc (right):

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
src/full-codegen/mips/full-codegen-mips.cc:4152: branch_address = pc - 5 *
kInstrSize;
On 2016/03/21 15:30:48, ivica.bogosavljevic wrote:
> Instead of 5 and 6, is it possible to have here named constants which have
> different values for different architectures? 5 and 6 or 3 or 4 doesn't mean
> much.
> In that case, there wouldn't be these branching depending on architecutre

Done.

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
src/full-codegen/mips/full-codegen-mips.cc:4152: branch_address = pc - 5 *
kInstrSize;
On 2016/03/24 12:12:47, balazs.kilvady wrote:
> On 2016/03/21 15:30:48, ivica.bogosavljevic wrote:
> > Instead of 5 and 6, is it possible to have here named constants which have
> > different values for different architectures? 5 and 6 or 3 or 4 doesn't mean
> > much.
> > In that case, there wouldn't be these branching depending on architecutre
> 
> Could kCallTargetAddressOffset and other constants from assembler-mips.h be
used
> here? They are already arch-specific.

Done.

https://codereview.chromium.org/1807263003/diff/1/src/full-codegen/mips/full-...
src/full-codegen/mips/full-codegen-mips.cc:4184: pc_immediate_load_address = pc
- 3 * kInstrSize;
On 2016/03/21 15:30:48, ivica.bogosavljevic wrote:
> Same as above

Done.

[balazs.kilvady, 2016-03-24 16:42:07]

LGTM

[miran.karic, 2016-03-25 12:29:31]

The CQ bit was checked by miran.karic@imgtec.com

[commit-bot: I haz the power, 2016-03-25 12:29:40]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1807263003/60001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1807263003/60001

[commit-bot: I haz the power, 2016-03-25 12:50:44]

Description was changed from

==========
MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=
==========

to

==========
MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=
==========

[commit-bot: I haz the power, 2016-03-25 12:50:45]

Committed patchset #4 (id:60001)

[commit-bot: I haz the power, 2016-03-25 12:50:58]

Description was changed from

==========
MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=
==========

to

==========
MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

This is another set of changes that replace JR and JALR instructions
with JIC and JIALC for mips32r6. Macroassembler Jump and Call functions
now use JIC and JIALC if branch delay slot is not used. Code patching is
adjusted to work with new changes and few minor fixes are added.

BUG=

Committed: https://crrev.com/21733b6b5259799ff4042db58473f986fe2e4a43
Cr-Commit-Position: refs/heads/master@{#35071}
==========

[commit-bot: I haz the power, 2016-03-25 12:50:59]

Patchset 4 (id:??) landed as
https://crrev.com/21733b6b5259799ff4042db58473f986fe2e4a43
Cr-Commit-Position: refs/heads/master@{#35071}