[wasm] Int64Lowering of Int64Add on ia32 and arm.

src/compiler/arm/instruction-selector-arm.cc

Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index 795529d8a3520a41a0df9a2e84ba89c62e2f2dc3..f17c92c9125f496220ebcacb9da6c7d01f8eb8ea 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -769,6 +769,20 @@ void InstructionSelector::VisitWord32Sar(Node* node) {
   VisitShift(this, node, TryMatchASR);
 }
 
+void InstructionSelector::VisitInt32AddPair(Node* node) {
+  ArmOperandGenerator g(this);
+
+  InstructionOperand inputs[] = {
+      g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)),
+      g.UseRegister(node->InputAt(2)), g.UseRegister(node->InputAt(3))};
+
+  InstructionOperand outputs[] = {
+      g.DefineSameAsFirst(node),

[jbramley, 2016/03/09 10:40:17]

Is DefineSameAsFirst necessary to stop inputs 1 and 3 from being overwritten?
Otherwise, could this just be another DefineAsRegister?

[ahaas, 2016/03/09 17:28:06]

I did some experiments with the register allocation now and found out that
DefineSameAsFirst is not sufficient. The only solutions I found was using fixed
registers or a temporary register. I decided for the temporary register. Jacob,
PTAL.

+      g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
+
+  Emit(kArmAddPair, 2, outputs, 4, inputs);
+}
+
 void InstructionSelector::VisitWord32PairShl(Node* node) {
   ArmOperandGenerator g(this);
   Int32Matcher m(node->InputAt(2));