OLD | NEW |
---|---|
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
(...skipping 751 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
762 Emit(kArmSbfx, g.DefineAsRegister(node), | 762 Emit(kArmSbfx, g.DefineAsRegister(node), |
763 g.UseRegister(mleft.left().node()), g.TempImmediate(sar - shl), | 763 g.UseRegister(mleft.left().node()), g.TempImmediate(sar - shl), |
764 g.TempImmediate(32 - sar)); | 764 g.TempImmediate(32 - sar)); |
765 return; | 765 return; |
766 } | 766 } |
767 } | 767 } |
768 } | 768 } |
769 VisitShift(this, node, TryMatchASR); | 769 VisitShift(this, node, TryMatchASR); |
770 } | 770 } |
771 | 771 |
772 void InstructionSelector::VisitInt32AddPair(Node* node) { | |
773 ArmOperandGenerator g(this); | |
774 | |
775 InstructionOperand inputs[] = { | |
776 g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1)), | |
777 g.UseRegister(node->InputAt(2)), g.UseRegister(node->InputAt(3))}; | |
778 | |
779 InstructionOperand outputs[] = { | |
780 g.DefineSameAsFirst(node), | |
jbramley
2016/03/09 10:40:17
Is DefineSameAsFirst necessary to stop inputs 1 an
ahaas
2016/03/09 17:28:06
I did some experiments with the register allocatio
| |
781 g.DefineAsRegister(NodeProperties::FindProjection(node, 1))}; | |
782 | |
783 Emit(kArmAddPair, 2, outputs, 4, inputs); | |
784 } | |
785 | |
772 void InstructionSelector::VisitWord32PairShl(Node* node) { | 786 void InstructionSelector::VisitWord32PairShl(Node* node) { |
773 ArmOperandGenerator g(this); | 787 ArmOperandGenerator g(this); |
774 Int32Matcher m(node->InputAt(2)); | 788 Int32Matcher m(node->InputAt(2)); |
775 InstructionOperand shift_operand; | 789 InstructionOperand shift_operand; |
776 if (m.HasValue()) { | 790 if (m.HasValue()) { |
777 shift_operand = g.UseImmediate(m.node()); | 791 shift_operand = g.UseImmediate(m.node()); |
778 } else { | 792 } else { |
779 shift_operand = g.UseUniqueRegister(m.node()); | 793 shift_operand = g.UseUniqueRegister(m.node()); |
780 } | 794 } |
781 | 795 |
(...skipping 951 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
1733 MachineOperatorBuilder::kFloat64RoundTiesAway | | 1747 MachineOperatorBuilder::kFloat64RoundTiesAway | |
1734 MachineOperatorBuilder::kFloat32RoundTiesEven | | 1748 MachineOperatorBuilder::kFloat32RoundTiesEven | |
1735 MachineOperatorBuilder::kFloat64RoundTiesEven; | 1749 MachineOperatorBuilder::kFloat64RoundTiesEven; |
1736 } | 1750 } |
1737 return flags; | 1751 return flags; |
1738 } | 1752 } |
1739 | 1753 |
1740 } // namespace compiler | 1754 } // namespace compiler |
1741 } // namespace internal | 1755 } // namespace internal |
1742 } // namespace v8 | 1756 } // namespace v8 |
OLD | NEW |