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Unified Diff: src/s390/macro-assembler-s390.cc

Issue 1725243004: S390: Initial impl of S390 asm, masm, code-stubs,... (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Updated BUILD.gn + cpu-s390.cc to addr @jochen's comments. Created 4 years, 10 months ago
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Index: src/s390/macro-assembler-s390.cc
diff --git a/src/ppc/macro-assembler-ppc.cc b/src/s390/macro-assembler-s390.cc
similarity index 54%
copy from src/ppc/macro-assembler-ppc.cc
copy to src/s390/macro-assembler-s390.cc
index 14759de0da334b700d2f96e720489672948b493b..d6fdc4bf2e00bd1446c9fa2963a312f66b05ffc8 100644
--- a/src/ppc/macro-assembler-ppc.cc
+++ b/src/s390/macro-assembler-s390.cc
@@ -5,7 +5,7 @@
#include <assert.h> // For assert
#include <limits.h> // For LONG_MIN, LONG_MAX.
-#if V8_TARGET_ARCH_PPC
+#if V8_TARGET_ARCH_S390
#include "src/base/bits.h"
#include "src/base/division-by-constant.h"
@@ -15,7 +15,7 @@
#include "src/register-configuration.h"
#include "src/runtime/runtime.h"
-#include "src/ppc/macro-assembler-ppc.h"
+#include "src/s390/macro-assembler-s390.h"
namespace v8 {
namespace internal {
@@ -31,56 +31,42 @@ MacroAssembler::MacroAssembler(Isolate* arg_isolate, void* buffer, int size,
}
}
-
-void MacroAssembler::Jump(Register target) {
- mtctr(target);
- bctr();
-}
-
+void MacroAssembler::Jump(Register target) { b(target); }
void MacroAssembler::JumpToJSEntry(Register target) {
Move(ip, target);
Jump(ip);
}
-
void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,
- Condition cond, CRegister cr) {
+ Condition cond, CRegister) {
Label skip;
- if (cond != al) b(NegateCondition(cond), &skip, cr);
+ if (cond != al) b(NegateCondition(cond), &skip);
DCHECK(rmode == RelocInfo::CODE_TARGET || rmode == RelocInfo::RUNTIME_ENTRY);
mov(ip, Operand(target, rmode));
- mtctr(ip);
- bctr();
+ b(ip);
bind(&skip);
}
-
void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode, Condition cond,
CRegister cr) {
DCHECK(!RelocInfo::IsCodeTarget(rmode));
Jump(reinterpret_cast<intptr_t>(target), rmode, cond, cr);
}
-
void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,
Condition cond) {
DCHECK(RelocInfo::IsCodeTarget(rmode));
- // 'code' is always generated ppc code, never THUMB code
- AllowDeferredHandleDereference embedding_raw_address;
- Jump(reinterpret_cast<intptr_t>(code.location()), rmode, cond);
+ jump(code, rmode, cond);
}
-
-int MacroAssembler::CallSize(Register target) { return 2 * kInstrSize; }
-
+int MacroAssembler::CallSize(Register target) { return 2; } // BASR
void MacroAssembler::Call(Register target) {
- BlockTrampolinePoolScope block_trampoline_pool(this);
Label start;
bind(&start);
@@ -88,37 +74,44 @@ void MacroAssembler::Call(Register target) {
// address is loaded.
positions_recorder()->WriteRecordedPositions();
- // branch via link register and set LK bit for return point
- mtctr(target);
- bctrl();
+ // Branch to target via indirect branch
+ basr(r14, target);
DCHECK_EQ(CallSize(target), SizeOfCodeGeneratedSince(&start));
}
-
void MacroAssembler::CallJSEntry(Register target) {
DCHECK(target.is(ip));
Call(target);
}
-
int MacroAssembler::CallSize(Address target, RelocInfo::Mode rmode,
Condition cond) {
- Operand mov_operand = Operand(reinterpret_cast<intptr_t>(target), rmode);
- return (2 + instructions_required_for_mov(ip, mov_operand)) * kInstrSize;
+ // S390 Assembler::move sequence is IILF / IIHF
+ int size;
+#if V8_TARGET_ARCH_S390X
+ size = 14; // IILF + IIHF + BASR
+#else
+ size = 8; // IILF + BASR
+#endif
+ return size;
}
-
int MacroAssembler::CallSizeNotPredictableCodeSize(Address target,
RelocInfo::Mode rmode,
Condition cond) {
- return (2 + kMovInstructionsNoConstantPool) * kInstrSize;
+ // S390 Assembler::move sequence is IILF / IIHF
+ int size;
+#if V8_TARGET_ARCH_S390X
+ size = 14; // IILF + IIHF + BASR
+#else
+ size = 8; // IILF + BASR
+#endif
+ return size;
}
-
void MacroAssembler::Call(Address target, RelocInfo::Mode rmode,
Condition cond) {
- BlockTrampolinePoolScope block_trampoline_pool(this);
DCHECK(cond == al);
#ifdef DEBUG
@@ -133,31 +126,20 @@ void MacroAssembler::Call(Address target, RelocInfo::Mode rmode,
// address is loaded.
positions_recorder()->WriteRecordedPositions();
- // This can likely be optimized to make use of bc() with 24bit relative
- //
- // RecordRelocInfo(x.rmode_, x.imm_);
- // bc( BA, .... offset, LKset);
- //
-
mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode));
- mtctr(ip);
- bctrl();
+ basr(r14, ip);
DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
}
-
int MacroAssembler::CallSize(Handle<Code> code, RelocInfo::Mode rmode,
TypeFeedbackId ast_id, Condition cond) {
- AllowDeferredHandleDereference using_raw_address;
- return CallSize(reinterpret_cast<Address>(code.location()), rmode, cond);
+ return 6; // BRASL
}
-
void MacroAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
TypeFeedbackId ast_id, Condition cond) {
- BlockTrampolinePoolScope block_trampoline_pool(this);
- DCHECK(RelocInfo::IsCodeTarget(rmode));
+ DCHECK(RelocInfo::IsCodeTarget(rmode) && cond == al);
#ifdef DEBUG
// Check the expected size before generating code to ensure we assume the same
@@ -166,37 +148,28 @@ void MacroAssembler::Call(Handle<Code> code, RelocInfo::Mode rmode,
Label start;
bind(&start);
#endif
-
- if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
- SetRecordedAstId(ast_id);
- rmode = RelocInfo::CODE_TARGET_WITH_ID;
- }
- AllowDeferredHandleDereference using_raw_address;
- Call(reinterpret_cast<Address>(code.location()), rmode, cond);
+ call(code, rmode, ast_id);
DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));
}
-
void MacroAssembler::Drop(int count) {
if (count > 0) {
- Add(sp, sp, count * kPointerSize, r0);
+ la(sp, MemOperand(sp, count * kPointerSize));
}
}
void MacroAssembler::Drop(Register count, Register scratch) {
- ShiftLeftImm(scratch, count, Operand(kPointerSizeLog2));
- add(sp, sp, scratch);
+ ShiftLeftP(scratch, count, Operand(kPointerSizeLog2));
+ AddP(sp, sp, scratch);
}
-void MacroAssembler::Call(Label* target) { b(target, SetLK); }
-
+void MacroAssembler::Call(Label* target) { b(r14, target); }
void MacroAssembler::Push(Handle<Object> handle) {
mov(r0, Operand(handle));
push(r0);
}
-
void MacroAssembler::Move(Register dst, Handle<Object> value) {
AllowDeferredHandleDereference smi_check;
if (value->IsSmi()) {
@@ -213,27 +186,43 @@ void MacroAssembler::Move(Register dst, Handle<Object> value) {
}
}
-
void MacroAssembler::Move(Register dst, Register src, Condition cond) {
- DCHECK(cond == al);
if (!dst.is(src)) {
- mr(dst, src);
+ LoadRR(dst, src);
}
}
-
void MacroAssembler::Move(DoubleRegister dst, DoubleRegister src) {
if (!dst.is(src)) {
- fmr(dst, src);
+ ldr(dst, src);
}
}
+void MacroAssembler::InsertDoubleLow(DoubleRegister dst, Register src) {
+ StoreDouble(dst, MemOperand(sp, -kDoubleSize));
+#if V8_TARGET_LITTLE_ENDIAN
+ StoreW(src, MemOperand(sp, -kDoubleSize));
+#else
+ StoreW(src, MemOperand(sp, -kDoubleSize / 2));
+#endif
+ ldy(dst, MemOperand(sp, -kDoubleSize));
+}
+
+void MacroAssembler::InsertDoubleHigh(DoubleRegister dst, Register src) {
+ StoreDouble(dst, MemOperand(sp, -kDoubleSize));
+#if V8_TARGET_LITTLE_ENDIAN
+ StoreW(src, MemOperand(sp, -kDoubleSize / 2));
+#else
+ StoreW(src, MemOperand(sp, -kDoubleSize));
+#endif
+ ldy(dst, MemOperand(sp, -kDoubleSize));
+}
void MacroAssembler::MultiPush(RegList regs, Register location) {
int16_t num_to_push = NumberOfBitsSet(regs);
int16_t stack_offset = num_to_push * kPointerSize;
- subi(location, location, Operand(stack_offset));
+ SubP(location, location, Operand(stack_offset));
for (int16_t i = Register::kNumRegisters - 1; i >= 0; i--) {
if ((regs & (1 << i)) != 0) {
stack_offset -= kPointerSize;
@@ -242,7 +231,6 @@ void MacroAssembler::MultiPush(RegList regs, Register location) {
}
}
-
void MacroAssembler::MultiPop(RegList regs, Register location) {
int16_t stack_offset = 0;
@@ -252,63 +240,56 @@ void MacroAssembler::MultiPop(RegList regs, Register location) {
stack_offset += kPointerSize;
}
}
- addi(location, location, Operand(stack_offset));
+ AddP(location, location, Operand(stack_offset));
}
-
void MacroAssembler::MultiPushDoubles(RegList dregs, Register location) {
int16_t num_to_push = NumberOfBitsSet(dregs);
int16_t stack_offset = num_to_push * kDoubleSize;
- subi(location, location, Operand(stack_offset));
+ SubP(location, location, Operand(stack_offset));
for (int16_t i = DoubleRegister::kNumRegisters - 1; i >= 0; i--) {
if ((dregs & (1 << i)) != 0) {
DoubleRegister dreg = DoubleRegister::from_code(i);
stack_offset -= kDoubleSize;
- stfd(dreg, MemOperand(location, stack_offset));
+ StoreDouble(dreg, MemOperand(location, stack_offset));
}
}
}
-
void MacroAssembler::MultiPopDoubles(RegList dregs, Register location) {
int16_t stack_offset = 0;
for (int16_t i = 0; i < DoubleRegister::kNumRegisters; i++) {
if ((dregs & (1 << i)) != 0) {
DoubleRegister dreg = DoubleRegister::from_code(i);
- lfd(dreg, MemOperand(location, stack_offset));
+ LoadDouble(dreg, MemOperand(location, stack_offset));
stack_offset += kDoubleSize;
}
}
- addi(location, location, Operand(stack_offset));
+ AddP(location, location, Operand(stack_offset));
}
-
void MacroAssembler::LoadRoot(Register destination, Heap::RootListIndex index,
- Condition cond) {
- DCHECK(cond == al);
+ Condition) {
LoadP(destination, MemOperand(kRootRegister, index << kPointerSizeLog2), r0);
}
-
void MacroAssembler::StoreRoot(Register source, Heap::RootListIndex index,
- Condition cond) {
+ Condition) {
DCHECK(Heap::RootCanBeWrittenAfterInitialization(index));
- DCHECK(cond == al);
- StoreP(source, MemOperand(kRootRegister, index << kPointerSizeLog2), r0);
+ StoreP(source, MemOperand(kRootRegister, index << kPointerSizeLog2));
}
-
void MacroAssembler::InNewSpace(Register object, Register scratch,
Condition cond, Label* branch) {
DCHECK(cond == eq || cond == ne);
+ // TODO(joransiu): check if we can merge mov Operand into AndP.
const int mask =
(1 << MemoryChunk::IN_FROM_SPACE) | (1 << MemoryChunk::IN_TO_SPACE);
CheckPageFlag(object, scratch, mask, cond, branch);
}
-
void MacroAssembler::RecordWriteField(
Register object, int offset, Register value, Register dst,
LinkRegisterStatus lr_status, SaveFPRegsMode save_fp,
@@ -327,11 +308,11 @@ void MacroAssembler::RecordWriteField(
// of the object, so so offset must be a multiple of kPointerSize.
DCHECK(IsAligned(offset, kPointerSize));
- Add(dst, object, offset - kHeapObjectTag, r0);
+ lay(dst, MemOperand(object, offset - kHeapObjectTag));
if (emit_debug_code()) {
Label ok;
- andi(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
- beq(&ok, cr0);
+ AndP(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
+ beq(&ok, Label::kNear);
stop("Unaligned cell in write barrier");
bind(&ok);
}
@@ -349,7 +330,6 @@ void MacroAssembler::RecordWriteField(
}
}
-
// Will clobber 4 registers: object, map, dst, ip. The
// register 'object' contains a heap object pointer.
void MacroAssembler::RecordWriteForMap(Register object, Register map,
@@ -358,7 +338,7 @@ void MacroAssembler::RecordWriteForMap(Register object, Register map,
SaveFPRegsMode fp_mode) {
if (emit_debug_code()) {
LoadP(dst, FieldMemOperand(map, HeapObject::kMapOffset));
- Cmpi(dst, Operand(isolate()->factory()->meta_map()), r0);
+ CmpP(dst, Operand(isolate()->factory()->meta_map()));
Check(eq, kWrongAddressOrValuePassedToRecordWrite);
}
@@ -367,8 +347,7 @@ void MacroAssembler::RecordWriteForMap(Register object, Register map,
}
if (emit_debug_code()) {
- LoadP(ip, FieldMemOperand(object, HeapObject::kMapOffset));
- cmp(ip, map);
+ CmpP(map, FieldMemOperand(object, HeapObject::kMapOffset));
Check(eq, kWrongAddressOrValuePassedToRecordWrite);
}
@@ -382,26 +361,24 @@ void MacroAssembler::RecordWriteForMap(Register object, Register map,
map, // Used as scratch.
MemoryChunk::kPointersToHereAreInterestingMask, eq, &done);
- addi(dst, object, Operand(HeapObject::kMapOffset - kHeapObjectTag));
+ lay(dst, MemOperand(object, HeapObject::kMapOffset - kHeapObjectTag));
if (emit_debug_code()) {
Label ok;
- andi(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
- beq(&ok, cr0);
+ AndP(r0, dst, Operand((1 << kPointerSizeLog2) - 1));
+ beq(&ok, Label::kNear);
stop("Unaligned cell in write barrier");
bind(&ok);
}
// Record the actual write.
if (lr_status == kLRHasNotBeenSaved) {
- mflr(r0);
- push(r0);
+ push(r14);
}
RecordWriteStub stub(isolate(), object, map, dst, OMIT_REMEMBERED_SET,
fp_mode);
CallStub(&stub);
if (lr_status == kLRHasNotBeenSaved) {
- pop(r0);
- mtlr(r0);
+ pop(r14);
}
bind(&done);
@@ -418,7 +395,6 @@ void MacroAssembler::RecordWriteForMap(Register object, Register map,
}
}
-
// Will clobber 4 registers: object, address, scratch, ip. The
// register 'object' contains a heap object pointer. The heap object
// tag is shifted away.
@@ -429,8 +405,7 @@ void MacroAssembler::RecordWrite(
PointersToHereCheck pointers_to_here_check_for_value) {
DCHECK(!object.is(value));
if (emit_debug_code()) {
- LoadP(r0, MemOperand(address));
- cmp(r0, value);
+ CmpP(value, MemOperand(address));
Check(eq, kWrongAddressOrValuePassedToRecordWrite);
}
@@ -438,7 +413,6 @@ void MacroAssembler::RecordWrite(
!FLAG_incremental_marking) {
return;
}
-
// First, check if a write barrier is even needed. The tests below
// catch stores of smis and stores into the young generation.
Label done;
@@ -458,15 +432,13 @@ void MacroAssembler::RecordWrite(
// Record the actual write.
if (lr_status == kLRHasNotBeenSaved) {
- mflr(r0);
- push(r0);
+ push(r14);
}
RecordWriteStub stub(isolate(), object, value, address, remembered_set_action,
fp_mode);
CallStub(&stub);
if (lr_status == kLRHasNotBeenSaved) {
- pop(r0);
- mtlr(r0);
+ pop(r14);
}
bind(&done);
@@ -494,15 +466,15 @@ void MacroAssembler::RecordWriteCodeEntryField(Register js_function,
// do.
if (!FLAG_incremental_marking) return;
- DCHECK(js_function.is(r4));
- DCHECK(code_entry.is(r7));
- DCHECK(scratch.is(r8));
+ DCHECK(js_function.is(r3));
+ DCHECK(code_entry.is(r6));
+ DCHECK(scratch.is(r7));
AssertNotSmi(js_function);
if (emit_debug_code()) {
- addi(scratch, js_function, Operand(offset - kHeapObjectTag));
+ AddP(scratch, js_function, Operand(offset - kHeapObjectTag));
LoadP(ip, MemOperand(scratch));
- cmp(ip, code_entry);
+ CmpP(ip, code_entry);
Check(eq, kWrongAddressOrValuePassedToRecordWrite);
}
@@ -516,21 +488,20 @@ void MacroAssembler::RecordWriteCodeEntryField(Register js_function,
MemoryChunk::kPointersFromHereAreInterestingMask, eq, &done);
const Register dst = scratch;
- addi(dst, js_function, Operand(offset - kHeapObjectTag));
+ AddP(dst, js_function, Operand(offset - kHeapObjectTag));
// Save caller-saved registers. js_function and code_entry are in the
// caller-saved register list.
DCHECK(kJSCallerSaved & js_function.bit());
DCHECK(kJSCallerSaved & code_entry.bit());
- mflr(r0);
- MultiPush(kJSCallerSaved | r0.bit());
+ MultiPush(kJSCallerSaved | r14.bit());
int argument_count = 3;
PrepareCallCFunction(argument_count, code_entry);
- mr(r3, js_function);
- mr(r4, dst);
- mov(r5, Operand(ExternalReference::isolate_address(isolate())));
+ LoadRR(r2, js_function);
+ LoadRR(r3, dst);
+ mov(r4, Operand(ExternalReference::isolate_address(isolate())));
{
AllowExternalCallThatCantCauseGC scope(this);
@@ -541,8 +512,7 @@ void MacroAssembler::RecordWriteCodeEntryField(Register js_function,
}
// Restore caller-saved registers (including js_function and code_entry).
- MultiPop(kJSCallerSaved | r0.bit());
- mtlr(r0);
+ MultiPop(kJSCallerSaved | r14.bit());
bind(&done);
}
@@ -565,77 +535,55 @@ void MacroAssembler::RememberedSetHelper(Register object, // For debug tests.
LoadP(scratch, MemOperand(ip));
// Store pointer to buffer and increment buffer top.
StoreP(address, MemOperand(scratch));
- addi(scratch, scratch, Operand(kPointerSize));
+ AddP(scratch, Operand(kPointerSize));
// Write back new top of buffer.
StoreP(scratch, MemOperand(ip));
// Call stub on end of buffer.
// Check for end of buffer.
- mov(r0, Operand(StoreBuffer::kStoreBufferOverflowBit));
- and_(r0, scratch, r0, SetRC);
+ AndP(scratch, Operand(StoreBuffer::kStoreBufferOverflowBit));
if (and_then == kFallThroughAtEnd) {
- beq(&done, cr0);
+ beq(&done, Label::kNear);
} else {
DCHECK(and_then == kReturnAtEnd);
- Ret(eq, cr0);
+ beq(&done, Label::kNear);
}
- mflr(r0);
- push(r0);
+ push(r14);
StoreBufferOverflowStub store_buffer_overflow(isolate(), fp_mode);
CallStub(&store_buffer_overflow);
- pop(r0);
- mtlr(r0);
+ pop(r14);
bind(&done);
if (and_then == kReturnAtEnd) {
Ret();
}
}
-
void MacroAssembler::PushFixedFrame(Register marker_reg) {
- mflr(r0);
- if (FLAG_enable_embedded_constant_pool) {
- if (marker_reg.is_valid()) {
- Push(r0, fp, kConstantPoolRegister, cp, marker_reg);
- } else {
- Push(r0, fp, kConstantPoolRegister, cp);
- }
+ CleanseP(r14);
+ if (marker_reg.is_valid()) {
+ Push(r14, fp, cp, marker_reg);
} else {
- if (marker_reg.is_valid()) {
- Push(r0, fp, cp, marker_reg);
- } else {
- Push(r0, fp, cp);
- }
+ Push(r14, fp, cp);
}
}
-
void MacroAssembler::PopFixedFrame(Register marker_reg) {
- if (FLAG_enable_embedded_constant_pool) {
- if (marker_reg.is_valid()) {
- Pop(r0, fp, kConstantPoolRegister, cp, marker_reg);
- } else {
- Pop(r0, fp, kConstantPoolRegister, cp);
- }
+ if (marker_reg.is_valid()) {
+ Pop(r14, fp, cp, marker_reg);
} else {
- if (marker_reg.is_valid()) {
- Pop(r0, fp, cp, marker_reg);
- } else {
- Pop(r0, fp, cp);
- }
+ Pop(r14, fp, cp);
}
- mtlr(r0);
}
void MacroAssembler::RestoreFrameStateForTailCall() {
- if (FLAG_enable_embedded_constant_pool) {
- LoadP(kConstantPoolRegister,
- MemOperand(fp, StandardFrameConstants::kConstantPoolOffset));
- set_constant_pool_available(false);
- }
- LoadP(r0, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
+ // if (FLAG_enable_embedded_constant_pool) {
+ // LoadP(kConstantPoolRegister,
+ // MemOperand(fp, StandardFrameConstants::kConstantPoolOffset));
+ // set_constant_pool_available(false);
+ // }
+ DCHECK(!FLAG_enable_embedded_constant_pool);
+ LoadP(r14, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
LoadP(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
- mtlr(r0);
}
const RegList MacroAssembler::kSafepointSavedRegisters = Register::kAllocatable;
@@ -649,31 +597,27 @@ void MacroAssembler::PushSafepointRegisters() {
const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
DCHECK(num_unsaved >= 0);
if (num_unsaved > 0) {
- subi(sp, sp, Operand(num_unsaved * kPointerSize));
+ lay(sp, MemOperand(sp, -(num_unsaved * kPointerSize)));
}
MultiPush(kSafepointSavedRegisters);
}
-
void MacroAssembler::PopSafepointRegisters() {
const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;
MultiPop(kSafepointSavedRegisters);
if (num_unsaved > 0) {
- addi(sp, sp, Operand(num_unsaved * kPointerSize));
+ la(sp, MemOperand(sp, num_unsaved * kPointerSize));
}
}
-
void MacroAssembler::StoreToSafepointRegisterSlot(Register src, Register dst) {
StoreP(src, SafepointRegisterSlot(dst));
}
-
void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {
LoadP(dst, SafepointRegisterSlot(src));
}
-
int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
// The registers are pushed starting with the highest encoding,
// which means that lowest encodings are closest to the stack pointer.
@@ -691,12 +635,10 @@ int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {
return index;
}
-
MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {
return MemOperand(sp, SafepointRegisterStackIndex(reg.code()) * kPointerSize);
}
-
MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
// General purpose registers are pushed last on the stack.
const RegisterConfiguration* config =
@@ -706,149 +648,249 @@ MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {
return MemOperand(sp, doubles_size + register_offset);
}
-
void MacroAssembler::CanonicalizeNaN(const DoubleRegister dst,
const DoubleRegister src) {
- // Turn potential sNaN into qNaN.
- fsub(dst, src, kDoubleRegZero);
+ // Turn potential sNaN into qNaN
+ if (!dst.is(src)) ldr(dst, src);
+ lzdr(kDoubleRegZero);
+ sdbr(dst, kDoubleRegZero);
}
void MacroAssembler::ConvertIntToDouble(Register src, DoubleRegister dst) {
- MovIntToDouble(dst, src, r0);
- fcfid(dst, dst);
+ cdfbr(dst, src);
}
void MacroAssembler::ConvertUnsignedIntToDouble(Register src,
DoubleRegister dst) {
- MovUnsignedIntToDouble(dst, src, r0);
- fcfid(dst, dst);
+ if (CpuFeatures::IsSupported(FLOATING_POINT_EXT)) {
+ cdlfbr(Condition(5), Condition(0), dst, src);
+ } else {
+ // zero-extend src
+ llgfr(src, src);
+ // convert to double
+ cdgbr(dst, src);
+ }
}
void MacroAssembler::ConvertIntToFloat(Register src, DoubleRegister dst) {
- MovIntToDouble(dst, src, r0);
- fcfids(dst, dst);
+ cefbr(dst, src);
}
void MacroAssembler::ConvertUnsignedIntToFloat(Register src,
DoubleRegister dst) {
- MovUnsignedIntToDouble(dst, src, r0);
- fcfids(dst, dst);
+ celfbr(Condition(0), Condition(0), dst, src);
}
-#if V8_TARGET_ARCH_PPC64
+#if V8_TARGET_ARCH_S390X
void MacroAssembler::ConvertInt64ToDouble(Register src,
DoubleRegister double_dst) {
- MovInt64ToDouble(double_dst, src);
- fcfid(double_dst, double_dst);
+ cdgbr(double_dst, src);
}
-
void MacroAssembler::ConvertUnsignedInt64ToFloat(Register src,
DoubleRegister double_dst) {
- MovInt64ToDouble(double_dst, src);
- fcfidus(double_dst, double_dst);
+ celgbr(Condition(0), Condition(0), double_dst, src);
}
-
void MacroAssembler::ConvertUnsignedInt64ToDouble(Register src,
DoubleRegister double_dst) {
- MovInt64ToDouble(double_dst, src);
- fcfidu(double_dst, double_dst);
+ cdlgbr(Condition(0), Condition(0), double_dst, src);
}
-
void MacroAssembler::ConvertInt64ToFloat(Register src,
DoubleRegister double_dst) {
- MovInt64ToDouble(double_dst, src);
- fcfids(double_dst, double_dst);
+ cegbr(double_dst, src);
}
#endif
+void MacroAssembler::ConvertFloat32ToInt64(const DoubleRegister double_input,
+#if !V8_TARGET_ARCH_S390X
+ const Register dst_hi,
+#endif
+ const Register dst,
+ const DoubleRegister double_dst,
+ FPRoundingMode rounding_mode) {
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
+ }
+ cgebr(m, dst, double_input);
+ ldgr(double_dst, dst);
+#if !V8_TARGET_ARCH_S390X
+ srlg(dst_hi, dst, Operand(32));
+#endif
+}
void MacroAssembler::ConvertDoubleToInt64(const DoubleRegister double_input,
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
const Register dst_hi,
#endif
const Register dst,
const DoubleRegister double_dst,
FPRoundingMode rounding_mode) {
- if (rounding_mode == kRoundToZero) {
- fctidz(double_dst, double_input);
- } else {
- SetRoundingMode(rounding_mode);
- fctid(double_dst, double_input);
- ResetRoundingMode();
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
}
-
- MovDoubleToInt64(
-#if !V8_TARGET_ARCH_PPC64
- dst_hi,
+ cgdbr(m, dst, double_input);
+ ldgr(double_dst, dst);
+#if !V8_TARGET_ARCH_S390X
+ srlg(dst_hi, dst, Operand(32));
#endif
- dst, double_dst);
}
-#if V8_TARGET_ARCH_PPC64
-void MacroAssembler::ConvertDoubleToUnsignedInt64(
+void MacroAssembler::ConvertFloat32ToInt32(const DoubleRegister double_input,
+ const Register dst,
+ const DoubleRegister double_dst,
+ FPRoundingMode rounding_mode) {
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
+ }
+ cfebr(m, dst, double_input);
+ ldgr(double_dst, dst);
+}
+
+void MacroAssembler::ConvertFloat32ToUnsignedInt32(
const DoubleRegister double_input, const Register dst,
const DoubleRegister double_dst, FPRoundingMode rounding_mode) {
- if (rounding_mode == kRoundToZero) {
- fctiduz(double_dst, double_input);
- } else {
- SetRoundingMode(rounding_mode);
- fctidu(double_dst, double_input);
- ResetRoundingMode();
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
}
-
- MovDoubleToInt64(dst, double_dst);
+ clfebr(m, Condition(0), dst, double_input);
+ ldgr(double_dst, dst);
}
-#endif
-
-void MacroAssembler::LoadConstantPoolPointerRegisterFromCodeTargetAddress(
- Register code_target_address) {
- lwz(kConstantPoolRegister,
- MemOperand(code_target_address,
- Code::kConstantPoolOffset - Code::kHeaderSize));
- add(kConstantPoolRegister, kConstantPoolRegister, code_target_address);
+#if V8_TARGET_ARCH_S390X
+void MacroAssembler::ConvertFloat32ToUnsignedInt64(
+ const DoubleRegister double_input, const Register dst,
+ const DoubleRegister double_dst, FPRoundingMode rounding_mode) {
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
+ }
+ clgebr(m, Condition(0), dst, double_input);
+ ldgr(double_dst, dst);
}
-
-void MacroAssembler::LoadConstantPoolPointerRegister(Register base,
- int code_start_delta) {
- add_label_offset(kConstantPoolRegister, base, ConstantPoolPosition(),
- code_start_delta);
+void MacroAssembler::ConvertDoubleToUnsignedInt64(
+ const DoubleRegister double_input, const Register dst,
+ const DoubleRegister double_dst, FPRoundingMode rounding_mode) {
+ Condition m = Condition(0);
+ switch (rounding_mode) {
+ case kRoundToZero:
+ m = Condition(5);
+ break;
+ case kRoundToNearest:
+ UNIMPLEMENTED();
+ break;
+ case kRoundToPlusInf:
+ m = Condition(6);
+ break;
+ case kRoundToMinusInf:
+ m = Condition(7);
+ break;
+ default:
+ UNIMPLEMENTED();
+ break;
+ }
+ clgdbr(m, Condition(0), dst, double_input);
+ ldgr(double_dst, dst);
}
+#endif
-
-void MacroAssembler::LoadConstantPoolPointerRegister() {
- mov_label_addr(kConstantPoolRegister, ConstantPoolPosition());
+void MacroAssembler::MovDoubleToInt64(Register dst, DoubleRegister src) {
+ lgdr(dst, src);
}
+void MacroAssembler::MovInt64ToDouble(DoubleRegister dst, Register src) {
+ ldgr(dst, src);
+}
void MacroAssembler::StubPrologue(Register base, int prologue_offset) {
- LoadSmiLiteral(r11, Smi::FromInt(StackFrame::STUB));
- PushFixedFrame(r11);
+ PushFixedFrame();
+ Push(Smi::FromInt(StackFrame::STUB));
// Adjust FP to point to saved FP.
- addi(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
- if (FLAG_enable_embedded_constant_pool) {
- if (!base.is(no_reg)) {
- // base contains prologue address
- LoadConstantPoolPointerRegister(base, -prologue_offset);
- } else {
- LoadConstantPoolPointerRegister();
- }
- set_constant_pool_available(true);
- }
+ la(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
}
-
void MacroAssembler::Prologue(bool code_pre_aging, Register base,
int prologue_offset) {
DCHECK(!base.is(no_reg));
{
PredictableCodeSizeScope predictible_code_size_scope(
this, kNoCodeAgeSequenceLength);
- Assembler::BlockTrampolinePoolScope block_trampoline_pool(this);
// The following instructions must remain together and unmodified
// for code aging to work properly.
if (code_pre_aging) {
@@ -856,31 +898,26 @@ void MacroAssembler::Prologue(bool code_pre_aging, Register base,
// This matches the code found in PatchPlatformCodeAge()
Code* stub = Code::GetPreAgedCodeAgeStub(isolate());
intptr_t target = reinterpret_cast<intptr_t>(stub->instruction_start());
- // Don't use Call -- we need to preserve ip and lr
- nop(); // marker to detect sequence (see IsOld)
- mov(r3, Operand(target));
- Jump(r3);
- for (int i = 0; i < kCodeAgingSequenceNops; i++) {
- nop();
+ nop();
+ CleanseP(r14);
+ Push(r14);
+ mov(r2, Operand(target));
+ Call(r2);
+ for (int i = 0; i < kNoCodeAgeSequenceLength - kCodeAgingSequenceLength;
+ i += 2) {
+ // TODO(joransiu): Create nop function to pad
+ // (kNoCodeAgeSequenceLength - kCodeAgingSequenceLength) bytes.
+ nop(); // 2-byte nops().
}
} else {
// This matches the code found in GetNoCodeAgeSequence()
- PushFixedFrame(r4);
+ PushFixedFrame(r3);
// Adjust fp to point to saved fp.
- addi(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
- for (int i = 0; i < kNoCodeAgeSequenceNops; i++) {
- nop();
- }
+ la(fp, MemOperand(sp, StandardFrameConstants::kFixedFrameSizeFromFp));
}
}
- if (FLAG_enable_embedded_constant_pool) {
- // base contains prologue address
- LoadConstantPoolPointerRegister(base, -prologue_offset);
- set_constant_pool_available(true);
- }
}
-
void MacroAssembler::EmitLoadTypeFeedbackVector(Register vector) {
LoadP(vector, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
LoadP(vector, FieldMemOperand(vector, JSFunction::kSharedFunctionInfoOffset));
@@ -888,53 +925,37 @@ void MacroAssembler::EmitLoadTypeFeedbackVector(Register vector) {
FieldMemOperand(vector, SharedFunctionInfo::kFeedbackVectorOffset));
}
-
void MacroAssembler::EnterFrame(StackFrame::Type type,
bool load_constant_pool_pointer_reg) {
- if (FLAG_enable_embedded_constant_pool && load_constant_pool_pointer_reg) {
- PushFixedFrame();
- // This path should not rely on ip containing code entry.
- LoadConstantPoolPointerRegister();
- LoadSmiLiteral(ip, Smi::FromInt(type));
- push(ip);
- } else {
- LoadSmiLiteral(ip, Smi::FromInt(type));
- PushFixedFrame(ip);
- }
- // Adjust FP to point to saved FP.
- addi(fp, sp, Operand(StandardFrameConstants::kFixedFrameSizeFromFp));
+ // We create a stack frame with:
+ // Return Addr <-- old sp
+ // Old FP <-- new fp
+ // CP
+ // type
+ // CodeObject <-- new sp
+
+ LoadSmiLiteral(ip, Smi::FromInt(type));
+ PushFixedFrame(ip);
mov(r0, Operand(CodeObject()));
push(r0);
+ // Adjust FP to point to saved FP
+ la(fp, MemOperand(
+ sp, StandardFrameConstants::kFixedFrameSizeFromFp + kPointerSize));
}
-
int MacroAssembler::LeaveFrame(StackFrame::Type type, int stack_adjustment) {
- ConstantPoolUnavailableScope constant_pool_unavailable(this);
- // r3: preserved
- // r4: preserved
- // r5: preserved
-
// Drop the execution stack down to the frame pointer and restore
- // the caller's state.
- int frame_ends;
- LoadP(r0, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
- LoadP(ip, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
- if (FLAG_enable_embedded_constant_pool) {
- const int exitOffset = ExitFrameConstants::kConstantPoolOffset;
- const int standardOffset = StandardFrameConstants::kConstantPoolOffset;
- const int offset =
- ((type == StackFrame::EXIT) ? exitOffset : standardOffset);
- LoadP(kConstantPoolRegister, MemOperand(fp, offset));
- }
- mtlr(r0);
- frame_ends = pc_offset();
- Add(sp, fp, StandardFrameConstants::kCallerSPOffset + stack_adjustment, r0);
- mr(fp, ip);
+ // the caller frame pointer, return address and constant pool pointer.
+ LoadP(r14, MemOperand(fp, StandardFrameConstants::kCallerPCOffset));
+ lay(r1, MemOperand(
+ fp, StandardFrameConstants::kCallerSPOffset + stack_adjustment));
+ LoadP(fp, MemOperand(fp, StandardFrameConstants::kCallerFPOffset));
+ LoadRR(sp, r1);
+ int frame_ends = pc_offset();
return frame_ends;
}
-
// ExitFrame layout (probably wrongish.. needs updating)
//
// SP -> previousSP
@@ -948,9 +969,17 @@ int MacroAssembler::LeaveFrame(StackFrame::Type type, int stack_adjustment) {
// Prior to calling EnterExitFrame, we've got a bunch of parameters
// on the stack that we need to wrap a real frame around.. so first
// we reserve a slot for LK and push the previous SP which is captured
-// in the fp register (r31)
+// in the fp register (r11)
// Then - we buy a new frame
+// r14
+// oldFP <- newFP
+// SP
+// Code
+// Floats
+// gaps
+// Args
+// ABIRes <- newSP
void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
// Set up the frame structure on the stack.
DCHECK_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);
@@ -961,30 +990,23 @@ void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
// This is an opportunity to build a frame to wrap
// all of the pushes that have happened inside of V8
// since we were called from C code
-
- // replicate ARM frame - TODO make this more closely follow PPC ABI
- mflr(r0);
- Push(r0, fp);
- mr(fp, sp);
+ CleanseP(r14);
+ Push(r14, fp);
+ LoadRR(fp, sp);
// Reserve room for saved entry sp and code object.
- subi(sp, sp, Operand(ExitFrameConstants::kFrameSize));
+ lay(sp, MemOperand(sp, -ExitFrameConstants::kFrameSize));
if (emit_debug_code()) {
- li(r8, Operand::Zero());
- StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
+ StoreP(MemOperand(fp, ExitFrameConstants::kSPOffset), Operand::Zero(), r1);
}
- if (FLAG_enable_embedded_constant_pool) {
- StoreP(kConstantPoolRegister,
- MemOperand(fp, ExitFrameConstants::kConstantPoolOffset));
- }
- mov(r8, Operand(CodeObject()));
- StoreP(r8, MemOperand(fp, ExitFrameConstants::kCodeOffset));
+ mov(r1, Operand(CodeObject()));
+ StoreP(r1, MemOperand(fp, ExitFrameConstants::kCodeOffset));
// Save the frame pointer and the context in top.
- mov(r8, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
- StoreP(fp, MemOperand(r8));
- mov(r8, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
- StoreP(cp, MemOperand(r8));
+ mov(r1, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
+ StoreP(fp, MemOperand(r1));
+ mov(r1, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
+ StoreP(cp, MemOperand(r1));
// Optionally save all volatile double registers.
if (save_doubles) {
@@ -995,43 +1017,42 @@ void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
// since the sp slot and code slot were pushed after the fp.
}
- addi(sp, sp, Operand(-stack_space * kPointerSize));
+ lay(sp, MemOperand(sp, -stack_space * kPointerSize));
// Allocate and align the frame preparing for calling the runtime
// function.
- const int frame_alignment = ActivationFrameAlignment();
- if (frame_alignment > kPointerSize) {
- DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
- ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
+ const int frame_alignment = MacroAssembler::ActivationFrameAlignment();
+ if (frame_alignment > 0) {
+ DCHECK(frame_alignment == 8);
+ ClearRightImm(sp, sp, Operand(3)); // equivalent to &= -8
}
- li(r0, Operand::Zero());
- StorePU(r0, MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize));
+ StoreP(MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize),
+ Operand::Zero(), r0);
+ lay(sp, MemOperand(sp, -kNumRequiredStackFrameSlots * kPointerSize));
// Set the exit frame sp value to point just before the return address
// location.
- addi(r8, sp, Operand((kStackFrameExtraParamSlot + 1) * kPointerSize));
- StoreP(r8, MemOperand(fp, ExitFrameConstants::kSPOffset));
+ lay(r1, MemOperand(sp, kStackFrameSPSlot * kPointerSize));
+ StoreP(r1, MemOperand(fp, ExitFrameConstants::kSPOffset));
}
-
void MacroAssembler::InitializeNewString(Register string, Register length,
Heap::RootListIndex map_index,
Register scratch1, Register scratch2) {
SmiTag(scratch1, length);
LoadRoot(scratch2, map_index);
- StoreP(scratch1, FieldMemOperand(string, String::kLengthOffset), r0);
- li(scratch1, Operand(String::kEmptyHashField));
- StoreP(scratch2, FieldMemOperand(string, HeapObject::kMapOffset), r0);
- StoreP(scratch1, FieldMemOperand(string, String::kHashFieldSlot), r0);
+ StoreP(scratch1, FieldMemOperand(string, String::kLengthOffset));
+ StoreP(FieldMemOperand(string, String::kHashFieldSlot),
+ Operand(String::kEmptyHashField), scratch1);
+ StoreP(scratch2, FieldMemOperand(string, HeapObject::kMapOffset));
}
-
int MacroAssembler::ActivationFrameAlignment() {
#if !defined(USE_SIMULATOR)
// Running on the real platform. Use the alignment as mandated by the local
// environment.
- // Note: This will break if we ever start generating snapshots on one PPC
- // platform for another PPC platform with a different alignment.
+ // Note: This will break if we ever start generating snapshots on one S390
+ // platform for another S390 platform with a different alignment.
return base::OS::ActivationFrameAlignment();
#else // Simulated
// If we are using the simulator then we should always align to the expected
@@ -1042,25 +1063,21 @@ int MacroAssembler::ActivationFrameAlignment() {
#endif
}
-
void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
bool restore_context,
bool argument_count_is_length) {
- ConstantPoolUnavailableScope constant_pool_unavailable(this);
// Optionally restore all double registers.
if (save_doubles) {
// Calculate the stack location of the saved doubles and restore them.
const int kNumRegs = kNumCallerSavedDoubles;
- const int offset =
- (ExitFrameConstants::kFrameSize + kNumRegs * kDoubleSize);
- addi(r6, fp, Operand(-offset));
- MultiPopDoubles(kCallerSavedDoubles, r6);
+ lay(r5, MemOperand(fp, -(ExitFrameConstants::kFrameSize +
+ kNumRegs * kDoubleSize)));
+ MultiPopDoubles(kCallerSavedDoubles, r5);
}
// Clear top frame.
- li(r6, Operand::Zero());
mov(ip, Operand(ExternalReference(Isolate::kCEntryFPAddress, isolate())));
- StoreP(r6, MemOperand(ip));
+ StoreP(MemOperand(ip), Operand(0, kRelocInfo_NONEPTR), r0);
// Restore current context from top and clear it in debug mode.
if (restore_context) {
@@ -1069,7 +1086,7 @@ void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
}
#ifdef DEBUG
mov(ip, Operand(ExternalReference(Isolate::kContextAddress, isolate())));
- StoreP(r6, MemOperand(ip));
+ StoreP(MemOperand(ip), Operand(0, kRelocInfo_NONEPTR), r0);
#endif
// Tear down the exit frame, pop the arguments, and return.
@@ -1077,23 +1094,20 @@ void MacroAssembler::LeaveExitFrame(bool save_doubles, Register argument_count,
if (argument_count.is_valid()) {
if (!argument_count_is_length) {
- ShiftLeftImm(argument_count, argument_count, Operand(kPointerSizeLog2));
+ ShiftLeftP(argument_count, argument_count, Operand(kPointerSizeLog2));
}
- add(sp, sp, argument_count);
+ la(sp, MemOperand(sp, argument_count));
}
}
-
void MacroAssembler::MovFromFloatResult(const DoubleRegister dst) {
- Move(dst, d1);
+ Move(dst, d0);
}
-
void MacroAssembler::MovFromFloatParameter(const DoubleRegister dst) {
- Move(dst, d1);
+ Move(dst, d0);
}
-
void MacroAssembler::InvokePrologue(const ParameterCount& expected,
const ParameterCount& actual, Label* done,
bool* definitely_mismatches,
@@ -1105,21 +1119,21 @@ void MacroAssembler::InvokePrologue(const ParameterCount& expected,
// Check whether the expected and actual arguments count match. If not,
// setup registers according to contract with ArgumentsAdaptorTrampoline:
- // r3: actual arguments count
- // r4: function (passed through to callee)
- // r5: expected arguments count
+ // r2: actual arguments count
+ // r3: function (passed through to callee)
+ // r4: expected arguments count
// The code below is made a lot easier because the calling code already sets
// up actual and expected registers according to the contract if values are
// passed in registers.
- // ARM has some sanity checks as per below, considering add them for PPC
- // DCHECK(actual.is_immediate() || actual.reg().is(r3));
- // DCHECK(expected.is_immediate() || expected.reg().is(r5));
+ // ARM has some sanity checks as per below, considering add them for S390
+ // DCHECK(actual.is_immediate() || actual.reg().is(r2));
+ // DCHECK(expected.is_immediate() || expected.reg().is(r4));
if (expected.is_immediate()) {
DCHECK(actual.is_immediate());
- mov(r3, Operand(actual.immediate()));
+ mov(r2, Operand(actual.immediate()));
if (expected.immediate() == actual.immediate()) {
definitely_matches = true;
} else {
@@ -1132,16 +1146,16 @@ void MacroAssembler::InvokePrologue(const ParameterCount& expected,
definitely_matches = true;
} else {
*definitely_mismatches = true;
- mov(r5, Operand(expected.immediate()));
+ mov(r4, Operand(expected.immediate()));
}
}
} else {
if (actual.is_immediate()) {
- mov(r3, Operand(actual.immediate()));
- cmpi(expected.reg(), Operand(actual.immediate()));
+ mov(r2, Operand(actual.immediate()));
+ CmpPH(expected.reg(), Operand(actual.immediate()));
beq(&regular_invoke);
} else {
- cmp(expected.reg(), actual.reg());
+ CmpP(expected.reg(), actual.reg());
beq(&regular_invoke);
}
}
@@ -1162,16 +1176,15 @@ void MacroAssembler::InvokePrologue(const ParameterCount& expected,
}
}
-
void MacroAssembler::FloodFunctionIfStepping(Register fun, Register new_target,
const ParameterCount& expected,
const ParameterCount& actual) {
Label skip_flooding;
ExternalReference step_in_enabled =
ExternalReference::debug_step_in_enabled_address(isolate());
- mov(r7, Operand(step_in_enabled));
- lbz(r7, MemOperand(r7));
- cmpi(r7, Operand::Zero());
+ mov(r6, Operand(step_in_enabled));
+ LoadlB(r6, MemOperand(r6));
+ CmpP(r6, Operand::Zero());
beq(&skip_flooding);
{
FrameScope frame(this,
@@ -1205,7 +1218,6 @@ void MacroAssembler::FloodFunctionIfStepping(Register fun, Register new_target,
bind(&skip_flooding);
}
-
void MacroAssembler::InvokeFunctionCode(Register function, Register new_target,
const ParameterCount& expected,
const ParameterCount& actual,
@@ -1213,8 +1225,9 @@ void MacroAssembler::InvokeFunctionCode(Register function, Register new_target,
const CallWrapper& call_wrapper) {
// You can't call a function without a valid frame.
DCHECK(flag == JUMP_FUNCTION || has_frame());
- DCHECK(function.is(r4));
- DCHECK_IMPLIES(new_target.is_valid(), new_target.is(r6));
+
+ DCHECK(function.is(r3));
+ DCHECK_IMPLIES(new_target.is_valid(), new_target.is(r5));
if (call_wrapper.NeedsDebugStepCheck()) {
FloodFunctionIfStepping(function, new_target, expected, actual);
@@ -1222,7 +1235,7 @@ void MacroAssembler::InvokeFunctionCode(Register function, Register new_target,
// Clear the new.target register if not given.
if (!new_target.is_valid()) {
- LoadRoot(r6, Heap::kUndefinedValueRootIndex);
+ LoadRoot(r5, Heap::kUndefinedValueRootIndex);
}
Label done;
@@ -1250,7 +1263,6 @@ void MacroAssembler::InvokeFunctionCode(Register function, Register new_target,
}
}
-
void MacroAssembler::InvokeFunction(Register fun, Register new_target,
const ParameterCount& actual,
InvokeFlag flag,
@@ -1258,18 +1270,17 @@ void MacroAssembler::InvokeFunction(Register fun, Register new_target,
// You can't call a function without a valid frame.
DCHECK(flag == JUMP_FUNCTION || has_frame());
- // Contract with called JS functions requires that function is passed in r4.
- DCHECK(fun.is(r4));
-
- Register expected_reg = r5;
- Register temp_reg = r7;
-
- LoadP(temp_reg, FieldMemOperand(r4, JSFunction::kSharedFunctionInfoOffset));
- LoadP(cp, FieldMemOperand(r4, JSFunction::kContextOffset));
- LoadWordArith(expected_reg,
- FieldMemOperand(
- temp_reg, SharedFunctionInfo::kFormalParameterCountOffset));
-#if !defined(V8_TARGET_ARCH_PPC64)
+ // Contract with called JS functions requires that function is passed in r3.
+ DCHECK(fun.is(r3));
+
+ Register expected_reg = r4;
+ Register temp_reg = r6;
+ LoadP(temp_reg, FieldMemOperand(r3, JSFunction::kSharedFunctionInfoOffset));
+ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
+ LoadW(expected_reg,
+ FieldMemOperand(temp_reg,
+ SharedFunctionInfo::kFormalParameterCountOffset));
+#if !defined(V8_TARGET_ARCH_S390X)
SmiUntag(expected_reg);
#endif
@@ -1277,7 +1288,6 @@ void MacroAssembler::InvokeFunction(Register fun, Register new_target,
InvokeFunctionCode(fun, new_target, expected, actual, flag, call_wrapper);
}
-
void MacroAssembler::InvokeFunction(Register function,
const ParameterCount& expected,
const ParameterCount& actual,
@@ -1286,81 +1296,80 @@ void MacroAssembler::InvokeFunction(Register function,
// You can't call a function without a valid frame.
DCHECK(flag == JUMP_FUNCTION || has_frame());
- // Contract with called JS functions requires that function is passed in r4.
- DCHECK(function.is(r4));
+ // Contract with called JS functions requires that function is passed in r3.
+ DCHECK(function.is(r3));
// Get the function and setup the context.
- LoadP(cp, FieldMemOperand(r4, JSFunction::kContextOffset));
+ LoadP(cp, FieldMemOperand(r3, JSFunction::kContextOffset));
- InvokeFunctionCode(r4, no_reg, expected, actual, flag, call_wrapper);
+ InvokeFunctionCode(r3, no_reg, expected, actual, flag, call_wrapper);
}
-
void MacroAssembler::InvokeFunction(Handle<JSFunction> function,
const ParameterCount& expected,
const ParameterCount& actual,
InvokeFlag flag,
const CallWrapper& call_wrapper) {
- Move(r4, function);
- InvokeFunction(r4, expected, actual, flag, call_wrapper);
+ Move(r3, function);
+ InvokeFunction(r3, expected, actual, flag, call_wrapper);
}
-
void MacroAssembler::IsObjectJSStringType(Register object, Register scratch,
Label* fail) {
DCHECK(kNotStringTag != 0);
LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
- lbz(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
- andi(r0, scratch, Operand(kIsNotStringMask));
- bne(fail, cr0);
+ LoadlB(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+ mov(r0, Operand(kIsNotStringMask));
+ AndP(r0, scratch);
+ bne(fail);
}
-
void MacroAssembler::IsObjectNameType(Register object, Register scratch,
Label* fail) {
LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
- lbz(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
- cmpi(scratch, Operand(LAST_NAME_TYPE));
+ LoadlB(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));
+ CmpP(scratch, Operand(LAST_NAME_TYPE));
bgt(fail);
}
-
void MacroAssembler::DebugBreak() {
- li(r3, Operand::Zero());
- mov(r4,
+ LoadImmP(r2, Operand::Zero());
+ mov(r3,
Operand(ExternalReference(Runtime::kHandleDebuggerStatement, isolate())));
CEntryStub ces(isolate(), 1);
DCHECK(AllowThisStubCall(&ces));
Call(ces.GetCode(), RelocInfo::DEBUGGER_STATEMENT);
}
-
void MacroAssembler::PushStackHandler() {
// Adjust this code if not the case.
STATIC_ASSERT(StackHandlerConstants::kSize == 1 * kPointerSize);
STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0 * kPointerSize);
// Link the current handler as the next handler.
- // Preserve r3-r7.
- mov(r8, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
- LoadP(r0, MemOperand(r8));
- push(r0);
+ mov(r7, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
+ // Buy the full stack frame for 5 slots.
+ lay(sp, MemOperand(sp, -StackHandlerConstants::kSize));
+
+ // Copy the old handler into the next handler slot.
+ mvc(MemOperand(sp, StackHandlerConstants::kNextOffset), MemOperand(r7),
+ kPointerSize);
// Set this new handler as the current one.
- StoreP(sp, MemOperand(r8));
+ StoreP(sp, MemOperand(r7));
}
-
void MacroAssembler::PopStackHandler() {
STATIC_ASSERT(StackHandlerConstants::kSize == 1 * kPointerSize);
STATIC_ASSERT(StackHandlerConstants::kNextOffset == 0);
- pop(r4);
+ // Pop the Next Handler into r3 and store it into Handler Address reference.
+ Pop(r3);
mov(ip, Operand(ExternalReference(Isolate::kHandlerAddress, isolate())));
- StoreP(r4, MemOperand(ip));
-}
+ StoreP(r3, MemOperand(ip));
+}
void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
Register scratch, Label* miss) {
@@ -1374,7 +1383,7 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
LoadP(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
// In debug mode, make sure the lexical context is set.
#ifdef DEBUG
- cmpi(scratch, Operand::Zero());
+ CmpP(scratch, Operand::Zero());
Check(ne, kWeShouldNotHaveAnEmptyLexicalContext);
#endif
@@ -1388,30 +1397,28 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
push(holder_reg); // Temporarily save holder on the stack.
// Read the first word and compare to the native_context_map.
LoadP(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset));
- LoadRoot(ip, Heap::kNativeContextMapRootIndex);
- cmp(holder_reg, ip);
+ CompareRoot(holder_reg, Heap::kNativeContextMapRootIndex);
Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext);
pop(holder_reg); // Restore holder.
}
// Check if both contexts are the same.
LoadP(ip, FieldMemOperand(holder_reg, JSGlobalProxy::kNativeContextOffset));
- cmp(scratch, ip);
- beq(&same_contexts);
+ CmpP(scratch, ip);
+ beq(&same_contexts, Label::kNear);
// Check the context is a native context.
if (emit_debug_code()) {
+ // TODO(119): avoid push(holder_reg)/pop(holder_reg)
// Cannot use ip as a temporary in this verification code. Due to the fact
// that ip is clobbered as part of cmp with an object Operand.
- push(holder_reg); // Temporarily save holder on the stack.
- mr(holder_reg, ip); // Move ip to its holding place.
- LoadRoot(ip, Heap::kNullValueRootIndex);
- cmp(holder_reg, ip);
+ push(holder_reg); // Temporarily save holder on the stack.
+ LoadRR(holder_reg, ip); // Move ip to its holding place.
+ CompareRoot(holder_reg, Heap::kNullValueRootIndex);
Check(ne, kJSGlobalProxyContextShouldNotBeNull);
LoadP(holder_reg, FieldMemOperand(holder_reg, HeapObject::kMapOffset));
- LoadRoot(ip, Heap::kNativeContextMapRootIndex);
- cmp(holder_reg, ip);
+ CompareRoot(holder_reg, Heap::kNativeContextMapRootIndex);
Check(eq, kJSGlobalObjectNativeContextShouldBeANativeContext);
// Restore ip is not needed. ip is reloaded below.
pop(holder_reg); // Restore holder.
@@ -1427,13 +1434,12 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,
LoadP(scratch, FieldMemOperand(scratch, token_offset));
LoadP(ip, FieldMemOperand(ip, token_offset));
- cmp(scratch, ip);
+ CmpP(scratch, ip);
bne(miss);
bind(&same_contexts);
}
-
// Compute the hash code from the untagged key. This must be kept in sync with
// ComputeIntegerHash in utils.h and KeyedLoadGenericStub in
// code-stub-hydrogen.cc
@@ -1443,38 +1449,38 @@ void MacroAssembler::GetNumberHash(Register t0, Register scratch) {
SmiUntag(scratch);
// Xor original key with a seed.
- xor_(t0, t0, scratch);
+ XorP(t0, scratch);
// Compute the hash code from the untagged key. This must be kept in sync
// with ComputeIntegerHash in utils.h.
//
// hash = ~hash + (hash << 15);
- notx(scratch, t0);
- slwi(t0, t0, Operand(15));
- add(t0, scratch, t0);
+ LoadRR(scratch, t0);
+ NotP(scratch);
+ sll(t0, Operand(15));
+ AddP(t0, scratch, t0);
// hash = hash ^ (hash >> 12);
- srwi(scratch, t0, Operand(12));
- xor_(t0, t0, scratch);
+ ShiftRight(scratch, t0, Operand(12));
+ XorP(t0, scratch);
// hash = hash + (hash << 2);
- slwi(scratch, t0, Operand(2));
- add(t0, t0, scratch);
+ ShiftLeft(scratch, t0, Operand(2));
+ AddP(t0, t0, scratch);
// hash = hash ^ (hash >> 4);
- srwi(scratch, t0, Operand(4));
- xor_(t0, t0, scratch);
+ ShiftRight(scratch, t0, Operand(4));
+ XorP(t0, scratch);
// hash = hash * 2057;
- mr(r0, t0);
- slwi(scratch, t0, Operand(3));
- add(t0, t0, scratch);
- slwi(scratch, r0, Operand(11));
- add(t0, t0, scratch);
+ LoadRR(r0, t0);
+ ShiftLeft(scratch, t0, Operand(3));
+ AddP(t0, t0, scratch);
+ ShiftLeft(scratch, r0, Operand(11));
+ AddP(t0, t0, scratch);
// hash = hash ^ (hash >> 16);
- srwi(scratch, t0, Operand(16));
- xor_(t0, t0, scratch);
+ ShiftRight(scratch, t0, Operand(16));
+ XorP(t0, scratch);
// hash & 0x3fffffff
ExtractBitRange(t0, t0, 29, 0);
}
-
void MacroAssembler::LoadFromNumberDictionary(Label* miss, Register elements,
Register key, Register result,
Register t0, Register t1,
@@ -1506,31 +1512,32 @@ void MacroAssembler::LoadFromNumberDictionary(Label* miss, Register elements,
// Compute the capacity mask.
LoadP(t1, FieldMemOperand(elements, SeededNumberDictionary::kCapacityOffset));
SmiUntag(t1);
- subi(t1, t1, Operand(1));
+ SubP(t1, Operand(1));
// Generate an unrolled loop that performs a few probes before giving up.
for (int i = 0; i < kNumberDictionaryProbes; i++) {
// Use t2 for index calculations and keep the hash intact in t0.
- mr(t2, t0);
+ LoadRR(t2, t0);
// Compute the masked index: (hash + i + i * i) & mask.
if (i > 0) {
- addi(t2, t2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
+ AddP(t2, Operand(SeededNumberDictionary::GetProbeOffset(i)));
}
- and_(t2, t2, t1);
+ AndP(t2, t1);
// Scale the index by multiplying by the element size.
DCHECK(SeededNumberDictionary::kEntrySize == 3);
- slwi(ip, t2, Operand(1));
- add(t2, t2, ip); // t2 = t2 * 3
+ LoadRR(ip, t2);
+ sll(ip, Operand(1));
+ AddP(t2, ip); // t2 = t2 * 3
// Check if the key is identical to the name.
- slwi(t2, t2, Operand(kPointerSizeLog2));
- add(t2, elements, t2);
+ sll(t2, Operand(kPointerSizeLog2));
+ AddP(t2, elements);
LoadP(ip,
FieldMemOperand(t2, SeededNumberDictionary::kElementsStartOffset));
- cmp(key, ip);
+ CmpP(key, ip);
if (i != kNumberDictionaryProbes - 1) {
- beq(&done);
+ beq(&done, Label::kNear);
} else {
bne(miss);
}
@@ -1544,8 +1551,8 @@ void MacroAssembler::LoadFromNumberDictionary(Label* miss, Register elements,
LoadP(t1, FieldMemOperand(t2, kDetailsOffset));
LoadSmiLiteral(ip, Smi::FromInt(PropertyDetails::TypeField::kMask));
DCHECK_EQ(DATA, 0);
- and_(r0, t1, ip, SetRC);
- bne(miss, cr0);
+ AndP(r0, ip, t1);
+ bne(miss);
// Get the value at the masked, scaled index and return.
const int kValueOffset =
@@ -1553,7 +1560,6 @@ void MacroAssembler::LoadFromNumberDictionary(Label* miss, Register elements,
LoadP(result, FieldMemOperand(t2, kValueOffset));
}
-
void MacroAssembler::Allocate(int object_size, Register result,
Register scratch1, Register scratch2,
Label* gc_required, AllocationFlags flags) {
@@ -1561,9 +1567,9 @@ void MacroAssembler::Allocate(int object_size, Register result,
if (!FLAG_inline_new) {
if (emit_debug_code()) {
// Trash the registers to simulate an allocation failure.
- li(result, Operand(0x7091));
- li(scratch1, Operand(0x7191));
- li(scratch2, Operand(0x7291));
+ LoadImmP(result, Operand(0x7091));
+ LoadImmP(scratch1, Operand(0x7191));
+ LoadImmP(scratch2, Operand(0x7291));
}
b(gc_required);
return;
@@ -1603,7 +1609,7 @@ void MacroAssembler::Allocate(int object_size, Register result,
if (emit_debug_code()) {
// Assert that result actually contains top on entry.
LoadP(alloc_limit, MemOperand(top_address));
- cmp(result, alloc_limit);
+ CmpP(result, alloc_limit);
Check(eq, kUnexpectedAllocationTop);
}
// Load allocation limit. Result already contains allocation top.
@@ -1611,56 +1617,56 @@ void MacroAssembler::Allocate(int object_size, Register result,
}
if ((flags & DOUBLE_ALIGNMENT) != 0) {
- // Align the next allocation. Storing the filler map without checking top is
- // safe in new-space because the limit of the heap is aligned there.
-#if V8_TARGET_ARCH_PPC64
+// Align the next allocation. Storing the filler map without checking top is
+// safe in new-space because the limit of the heap is aligned there.
+#if V8_TARGET_ARCH_S390X
STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
#else
STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
- andi(result_end, result, Operand(kDoubleAlignmentMask));
+ AndP(result_end, result, Operand(kDoubleAlignmentMask));
Label aligned;
- beq(&aligned, cr0);
+ beq(&aligned);
if ((flags & PRETENURE) != 0) {
- cmpl(result, alloc_limit);
+ CmpLogicalP(result, alloc_limit);
bge(gc_required);
}
mov(result_end, Operand(isolate()->factory()->one_pointer_filler_map()));
- stw(result_end, MemOperand(result));
- addi(result, result, Operand(kDoubleSize / 2));
+ StoreW(result_end, MemOperand(result));
+ AddP(result, result, Operand(kDoubleSize / 2));
bind(&aligned);
#endif
}
// Calculate new top and bail out if new space is exhausted. Use result
// to calculate the new top.
- sub(r0, alloc_limit, result);
+ SubP(r0, alloc_limit, result);
if (is_int16(object_size)) {
- cmpi(r0, Operand(object_size));
+ CmpP(r0, Operand(object_size));
blt(gc_required);
- addi(result_end, result, Operand(object_size));
+ AddP(result_end, result, Operand(object_size));
} else {
- Cmpi(r0, Operand(object_size), result_end);
+ mov(result_end, Operand(object_size));
+ CmpP(r0, result_end);
blt(gc_required);
- add(result_end, result, result_end);
+ AddP(result_end, result, result_end);
}
StoreP(result_end, MemOperand(top_address));
// Tag object if requested.
if ((flags & TAG_OBJECT) != 0) {
- addi(result, result, Operand(kHeapObjectTag));
+ AddP(result, result, Operand(kHeapObjectTag));
}
}
-
void MacroAssembler::Allocate(Register object_size, Register result,
Register result_end, Register scratch,
Label* gc_required, AllocationFlags flags) {
if (!FLAG_inline_new) {
if (emit_debug_code()) {
// Trash the registers to simulate an allocation failure.
- li(result, Operand(0x7091));
- li(scratch, Operand(0x7191));
- li(result_end, Operand(0x7291));
+ LoadImmP(result, Operand(0x7091));
+ LoadImmP(scratch, Operand(0x7191));
+ LoadImmP(result_end, Operand(0x7291));
}
b(gc_required);
return;
@@ -1696,7 +1702,7 @@ void MacroAssembler::Allocate(Register object_size, Register result,
if (emit_debug_code()) {
// Assert that result actually contains top on entry.
LoadP(alloc_limit, MemOperand(top_address));
- cmp(result, alloc_limit);
+ CmpP(result, alloc_limit);
Check(eq, kUnexpectedAllocationTop);
}
// Load allocation limit. Result already contains allocation top.
@@ -1704,22 +1710,22 @@ void MacroAssembler::Allocate(Register object_size, Register result,
}
if ((flags & DOUBLE_ALIGNMENT) != 0) {
- // Align the next allocation. Storing the filler map without checking top is
- // safe in new-space because the limit of the heap is aligned there.
-#if V8_TARGET_ARCH_PPC64
+// Align the next allocation. Storing the filler map without checking top is
+// safe in new-space because the limit of the heap is aligned there.
+#if V8_TARGET_ARCH_S390X
STATIC_ASSERT(kPointerAlignment == kDoubleAlignment);
#else
STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);
- andi(result_end, result, Operand(kDoubleAlignmentMask));
+ AndP(result_end, result, Operand(kDoubleAlignmentMask));
Label aligned;
- beq(&aligned, cr0);
+ beq(&aligned);
if ((flags & PRETENURE) != 0) {
- cmpl(result, alloc_limit);
+ CmpLogicalP(result, alloc_limit);
bge(gc_required);
}
mov(result_end, Operand(isolate()->factory()->one_pointer_filler_map()));
- stw(result_end, MemOperand(result));
- addi(result, result, Operand(kDoubleSize / 2));
+ StoreW(result_end, MemOperand(result));
+ AddP(result, result, Operand(kDoubleSize / 2));
bind(&aligned);
#endif
}
@@ -1727,32 +1733,31 @@ void MacroAssembler::Allocate(Register object_size, Register result,
// Calculate new top and bail out if new space is exhausted. Use result
// to calculate the new top. Object size may be in words so a shift is
// required to get the number of bytes.
- sub(r0, alloc_limit, result);
+ SubP(r0, alloc_limit, result);
if ((flags & SIZE_IN_WORDS) != 0) {
- ShiftLeftImm(result_end, object_size, Operand(kPointerSizeLog2));
- cmp(r0, result_end);
+ ShiftLeftP(result_end, object_size, Operand(kPointerSizeLog2));
+ CmpP(r0, result_end);
blt(gc_required);
- add(result_end, result, result_end);
+ AddP(result_end, result, result_end);
} else {
- cmp(r0, object_size);
+ CmpP(r0, object_size);
blt(gc_required);
- add(result_end, result, object_size);
+ AddP(result_end, result, object_size);
}
// Update allocation top. result temporarily holds the new top.
if (emit_debug_code()) {
- andi(r0, result_end, Operand(kObjectAlignmentMask));
+ AndP(r0, result_end, Operand(kObjectAlignmentMask));
Check(eq, kUnalignedAllocationInNewSpace, cr0);
}
StoreP(result_end, MemOperand(top_address));
// Tag object if requested.
if ((flags & TAG_OBJECT) != 0) {
- addi(result, result, Operand(kHeapObjectTag));
+ AddP(result, result, Operand(kHeapObjectTag));
}
}
-
void MacroAssembler::AllocateTwoByteString(Register result, Register length,
Register scratch1, Register scratch2,
Register scratch3,
@@ -1760,11 +1765,11 @@ void MacroAssembler::AllocateTwoByteString(Register result, Register length,
// Calculate the number of bytes needed for the characters in the string while
// observing object alignment.
DCHECK((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);
- slwi(scratch1, length, Operand(1)); // Length in bytes, not chars.
- addi(scratch1, scratch1,
- Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
- mov(r0, Operand(~kObjectAlignmentMask));
- and_(scratch1, scratch1, r0);
+
+ ShiftLeft(scratch1, length, Operand(1)); // Length in bytes, not chars.
+ AddP(scratch1, Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));
+
+ AndP(scratch1, Operand(~kObjectAlignmentMask));
// Allocate two-byte string in new space.
Allocate(scratch1, result, scratch2, scratch3, gc_required, TAG_OBJECT);
@@ -1774,7 +1779,6 @@ void MacroAssembler::AllocateTwoByteString(Register result, Register length,
scratch2);
}
-
void MacroAssembler::AllocateOneByteString(Register result, Register length,
Register scratch1, Register scratch2,
Register scratch3,
@@ -1783,10 +1787,9 @@ void MacroAssembler::AllocateOneByteString(Register result, Register length,
// observing object alignment.
DCHECK((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);
DCHECK(kCharSize == 1);
- addi(scratch1, length,
+ AddP(scratch1, length,
Operand(kObjectAlignmentMask + SeqOneByteString::kHeaderSize));
- li(r0, Operand(~kObjectAlignmentMask));
- and_(scratch1, scratch1, r0);
+ AndP(scratch1, Operand(~kObjectAlignmentMask));
// Allocate one-byte string in new space.
Allocate(scratch1, result, scratch2, scratch3, gc_required, TAG_OBJECT);
@@ -1796,7 +1799,6 @@ void MacroAssembler::AllocateOneByteString(Register result, Register length,
scratch1, scratch2);
}
-
void MacroAssembler::AllocateTwoByteConsString(Register result, Register length,
Register scratch1,
Register scratch2,
@@ -1808,7 +1810,6 @@ void MacroAssembler::AllocateTwoByteConsString(Register result, Register length,
scratch2);
}
-
void MacroAssembler::AllocateOneByteConsString(Register result, Register length,
Register scratch1,
Register scratch2,
@@ -1820,7 +1821,6 @@ void MacroAssembler::AllocateOneByteConsString(Register result, Register length,
scratch1, scratch2);
}
-
void MacroAssembler::AllocateTwoByteSlicedString(Register result,
Register length,
Register scratch1,
@@ -1833,7 +1833,6 @@ void MacroAssembler::AllocateTwoByteSlicedString(Register result,
scratch2);
}
-
void MacroAssembler::AllocateOneByteSlicedString(Register result,
Register length,
Register scratch1,
@@ -1846,7 +1845,6 @@ void MacroAssembler::AllocateOneByteSlicedString(Register result,
scratch1, scratch2);
}
-
void MacroAssembler::CompareObjectType(Register object, Register map,
Register type_reg, InstanceType type) {
const Register temp = type_reg.is(no_reg) ? r0 : type_reg;
@@ -1855,60 +1853,57 @@ void MacroAssembler::CompareObjectType(Register object, Register map,
CompareInstanceType(map, temp, type);
}
-
void MacroAssembler::CompareInstanceType(Register map, Register type_reg,
InstanceType type) {
STATIC_ASSERT(Map::kInstanceTypeOffset < 4096);
STATIC_ASSERT(LAST_TYPE < 256);
- lbz(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
- cmpi(type_reg, Operand(type));
+ LoadlB(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
+ CmpP(type_reg, Operand(type));
}
-
void MacroAssembler::CompareRoot(Register obj, Heap::RootListIndex index) {
- DCHECK(!obj.is(r0));
- LoadRoot(r0, index);
- cmp(obj, r0);
+ CmpP(obj, MemOperand(kRootRegister, index << kPointerSizeLog2));
}
-
void MacroAssembler::CheckFastElements(Register map, Register scratch,
Label* fail) {
STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
STATIC_ASSERT(FAST_ELEMENTS == 2);
STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
- lbz(scratch, FieldMemOperand(map, Map::kBitField2Offset));
STATIC_ASSERT(Map::kMaximumBitField2FastHoleyElementValue < 0x8000);
- cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleyElementValue));
bgt(fail);
}
-
void MacroAssembler::CheckFastObjectElements(Register map, Register scratch,
Label* fail) {
STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
STATIC_ASSERT(FAST_ELEMENTS == 2);
STATIC_ASSERT(FAST_HOLEY_ELEMENTS == 3);
- lbz(scratch, FieldMemOperand(map, Map::kBitField2Offset));
- cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
ble(fail);
- cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleyElementValue));
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleyElementValue));
bgt(fail);
}
-
void MacroAssembler::CheckFastSmiElements(Register map, Register scratch,
Label* fail) {
STATIC_ASSERT(FAST_SMI_ELEMENTS == 0);
STATIC_ASSERT(FAST_HOLEY_SMI_ELEMENTS == 1);
- lbz(scratch, FieldMemOperand(map, Map::kBitField2Offset));
- cmpli(scratch, Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
+ CmpLogicalByte(FieldMemOperand(map, Map::kBitField2Offset),
+ Operand(Map::kMaximumBitField2FastHoleySmiElementValue));
bgt(fail);
}
-
+void MacroAssembler::SmiToDouble(DoubleRegister value, Register smi) {
+ SmiUntag(ip, smi);
+ ConvertIntToDouble(ip, value);
+}
void MacroAssembler::StoreNumberToDoubleElements(
Register value_reg, Register key_reg, Register elements_reg,
Register scratch1, DoubleRegister double_scratch, Label* fail,
@@ -1923,8 +1918,9 @@ void MacroAssembler::StoreNumberToDoubleElements(
CheckMap(value_reg, scratch1, isolate()->factory()->heap_number_map(), fail,
DONT_DO_SMI_CHECK);
- lfd(double_scratch, FieldMemOperand(value_reg, HeapNumber::kValueOffset));
- // Double value, turn potential sNaN into qNaN.
+ LoadDouble(double_scratch,
+ FieldMemOperand(value_reg, HeapNumber::kValueOffset));
+ // Force a canonical NaN.
CanonicalizeNaN(double_scratch);
b(&store);
@@ -1933,12 +1929,11 @@ void MacroAssembler::StoreNumberToDoubleElements(
bind(&store);
SmiToDoubleArrayOffset(scratch1, key_reg);
- add(scratch1, elements_reg, scratch1);
- stfd(double_scratch, FieldMemOperand(scratch1, FixedDoubleArray::kHeaderSize -
- elements_offset));
+ StoreDouble(double_scratch,
+ FieldMemOperand(elements_reg, scratch1,
+ FixedDoubleArray::kHeaderSize - elements_offset));
}
-
void MacroAssembler::AddAndCheckForOverflow(Register dst, Register left,
Register right,
Register overflow_dst,
@@ -1949,55 +1944,42 @@ void MacroAssembler::AddAndCheckForOverflow(Register dst, Register left,
DCHECK(!overflow_dst.is(left));
DCHECK(!overflow_dst.is(right));
+ // TODO(joransiu): Optimize paths for left == right.
bool left_is_right = left.is(right);
- RCBit xorRC = left_is_right ? SetRC : LeaveRC;
// C = A+B; C overflows if A/B have same sign and C has diff sign than A
if (dst.is(left)) {
- mr(scratch, left); // Preserve left.
- add(dst, left, right); // Left is overwritten.
- xor_(overflow_dst, dst, scratch, xorRC); // Original left.
- if (!left_is_right) xor_(scratch, dst, right);
+ LoadRR(scratch, left); // Preserve left.
+ AddP(dst, left, right); // Left is overwritten.
+ XorP(overflow_dst, scratch, dst); // Original left.
+ if (!left_is_right) XorP(scratch, dst, right);
} else if (dst.is(right)) {
- mr(scratch, right); // Preserve right.
- add(dst, left, right); // Right is overwritten.
- xor_(overflow_dst, dst, left, xorRC);
- if (!left_is_right) xor_(scratch, dst, scratch); // Original right.
+ LoadRR(scratch, right); // Preserve right.
+ AddP(dst, left, right); // Right is overwritten.
+ XorP(overflow_dst, dst, left);
+ if (!left_is_right) XorP(scratch, dst, scratch);
} else {
- add(dst, left, right);
- xor_(overflow_dst, dst, left, xorRC);
- if (!left_is_right) xor_(scratch, dst, right);
+ AddP(dst, left, right);
+ XorP(overflow_dst, dst, left);
+ if (!left_is_right) XorP(scratch, dst, right);
}
- if (!left_is_right) and_(overflow_dst, scratch, overflow_dst, SetRC);
+ if (!left_is_right) AndP(overflow_dst, scratch, overflow_dst);
+ LoadAndTestRR(overflow_dst, overflow_dst);
}
-
void MacroAssembler::AddAndCheckForOverflow(Register dst, Register left,
intptr_t right,
Register overflow_dst,
Register scratch) {
- Register original_left = left;
DCHECK(!dst.is(overflow_dst));
DCHECK(!dst.is(scratch));
DCHECK(!overflow_dst.is(scratch));
DCHECK(!overflow_dst.is(left));
- // C = A+B; C overflows if A/B have same sign and C has diff sign than A
- if (dst.is(left)) {
- // Preserve left.
- original_left = overflow_dst;
- mr(original_left, left);
- }
- Add(dst, left, right, scratch);
- xor_(overflow_dst, dst, original_left);
- if (right >= 0) {
- and_(overflow_dst, overflow_dst, dst, SetRC);
- } else {
- andc(overflow_dst, overflow_dst, dst, SetRC);
- }
+ mov(r1, Operand(right));
+ AddAndCheckForOverflow(dst, left, r1, overflow_dst, scratch);
}
-
void MacroAssembler::SubAndCheckForOverflow(Register dst, Register left,
Register right,
Register overflow_dst,
@@ -2010,40 +1992,43 @@ void MacroAssembler::SubAndCheckForOverflow(Register dst, Register left,
// C = A-B; C overflows if A/B have diff signs and C has diff sign than A
if (dst.is(left)) {
- mr(scratch, left); // Preserve left.
- sub(dst, left, right); // Left is overwritten.
- xor_(overflow_dst, dst, scratch);
- xor_(scratch, scratch, right);
- and_(overflow_dst, overflow_dst, scratch, SetRC);
+ LoadRR(scratch, left); // Preserve left.
+ SubP(dst, left, right); // Left is overwritten.
+ XorP(overflow_dst, dst, scratch);
+ XorP(scratch, right);
+ AndP(overflow_dst, scratch /*, SetRC*/);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+ // Should be okay to remove rc
} else if (dst.is(right)) {
- mr(scratch, right); // Preserve right.
- sub(dst, left, right); // Right is overwritten.
- xor_(overflow_dst, dst, left);
- xor_(scratch, left, scratch);
- and_(overflow_dst, overflow_dst, scratch, SetRC);
+ LoadRR(scratch, right); // Preserve right.
+ SubP(dst, left, right); // Right is overwritten.
+ XorP(overflow_dst, dst, left);
+ XorP(scratch, left);
+ AndP(overflow_dst, scratch /*, SetRC*/);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+ // Should be okay to remove rc
} else {
- sub(dst, left, right);
- xor_(overflow_dst, dst, left);
- xor_(scratch, left, right);
- and_(overflow_dst, scratch, overflow_dst, SetRC);
+ SubP(dst, left, right);
+ XorP(overflow_dst, dst, left);
+ XorP(scratch, left, right);
+ AndP(overflow_dst, scratch /*, SetRC*/);
+ LoadAndTestRR(overflow_dst, overflow_dst);
+ // Should be okay to remove rc
}
}
-
void MacroAssembler::CompareMap(Register obj, Register scratch, Handle<Map> map,
Label* early_success) {
LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
- CompareMap(scratch, map, early_success);
+ CompareMap(obj, map, early_success);
}
-
void MacroAssembler::CompareMap(Register obj_map, Handle<Map> map,
Label* early_success) {
mov(r0, Operand(map));
- cmp(obj_map, r0);
+ CmpP(r0, FieldMemOperand(obj_map, HeapObject::kMapOffset));
}
-
void MacroAssembler::CheckMap(Register obj, Register scratch, Handle<Map> map,
Label* fail, SmiCheckType smi_check_type) {
if (smi_check_type == DO_SMI_CHECK) {
@@ -2056,7 +2041,6 @@ void MacroAssembler::CheckMap(Register obj, Register scratch, Handle<Map> map,
bind(&success);
}
-
void MacroAssembler::CheckMap(Register obj, Register scratch,
Heap::RootListIndex index, Label* fail,
SmiCheckType smi_check_type) {
@@ -2064,12 +2048,10 @@ void MacroAssembler::CheckMap(Register obj, Register scratch,
JumpIfSmi(obj, fail);
}
LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset));
- LoadRoot(r0, index);
- cmp(scratch, r0);
+ CompareRoot(scratch, index);
bne(fail);
}
-
void MacroAssembler::DispatchWeakMap(Register obj, Register scratch1,
Register scratch2, Handle<WeakCell> cell,
Handle<Code> success,
@@ -2084,28 +2066,23 @@ void MacroAssembler::DispatchWeakMap(Register obj, Register scratch1,
bind(&fail);
}
-
void MacroAssembler::CmpWeakValue(Register value, Handle<WeakCell> cell,
- Register scratch, CRegister cr) {
+ Register scratch, CRegister) {
mov(scratch, Operand(cell));
- LoadP(scratch, FieldMemOperand(scratch, WeakCell::kValueOffset));
- cmp(value, scratch, cr);
+ CmpP(value, FieldMemOperand(scratch, WeakCell::kValueOffset));
}
-
void MacroAssembler::GetWeakValue(Register value, Handle<WeakCell> cell) {
mov(value, Operand(cell));
LoadP(value, FieldMemOperand(value, WeakCell::kValueOffset));
}
-
void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell,
Label* miss) {
GetWeakValue(value, cell);
JumpIfSmi(value, miss);
}
-
void MacroAssembler::GetMapConstructor(Register result, Register map,
Register temp, Register temp2) {
Label done, loop;
@@ -2119,7 +2096,6 @@ void MacroAssembler::GetMapConstructor(Register result, Register map,
bind(&done);
}
-
void MacroAssembler::TryGetFunctionPrototype(Register function, Register result,
Register scratch, Label* miss) {
// Get the prototype or initial map from the function.
@@ -2129,14 +2105,13 @@ void MacroAssembler::TryGetFunctionPrototype(Register function, Register result,
// If the prototype or initial map is the hole, don't return it and
// simply miss the cache instead. This will allow us to allocate a
// prototype object on-demand in the runtime system.
- LoadRoot(r0, Heap::kTheHoleValueRootIndex);
- cmp(result, r0);
+ CompareRoot(result, Heap::kTheHoleValueRootIndex);
beq(miss);
// If the function does not have an initial map, we're done.
Label done;
CompareObjectType(result, scratch, scratch, MAP_TYPE);
- bne(&done);
+ bne(&done, Label::kNear);
// Get the prototype from the initial map.
LoadP(result, FieldMemOperand(result, Map::kPrototypeOffset));
@@ -2145,24 +2120,20 @@ void MacroAssembler::TryGetFunctionPrototype(Register function, Register result,
bind(&done);
}
-
void MacroAssembler::CallStub(CodeStub* stub, TypeFeedbackId ast_id,
Condition cond) {
DCHECK(AllowThisStubCall(stub)); // Stub calls are not allowed in some stubs.
Call(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond);
}
-
void MacroAssembler::TailCallStub(CodeStub* stub, Condition cond) {
Jump(stub->GetCode(), RelocInfo::CODE_TARGET, cond);
}
-
bool MacroAssembler::AllowThisStubCall(CodeStub* stub) {
return has_frame_ || !stub->SometimesSetsUpAFrame();
}
-
void MacroAssembler::IndexFromHash(Register hash, Register index) {
// If the hash field contains an array index pick it out. The assert checks
// that the constants for the maximum number of digits for an array index
@@ -2173,13 +2144,6 @@ void MacroAssembler::IndexFromHash(Register hash, Register index) {
DecodeFieldToSmi<String::ArrayIndexValueBits>(index, hash);
}
-
-void MacroAssembler::SmiToDouble(DoubleRegister value, Register smi) {
- SmiUntag(ip, smi);
- ConvertIntToDouble(ip, value);
-}
-
-
void MacroAssembler::TestDoubleIsInt32(DoubleRegister double_input,
Register scratch1, Register scratch2,
DoubleRegister double_scratch) {
@@ -2189,37 +2153,31 @@ void MacroAssembler::TestDoubleIsInt32(DoubleRegister double_input,
void MacroAssembler::TestDoubleIsMinusZero(DoubleRegister input,
Register scratch1,
Register scratch2) {
-#if V8_TARGET_ARCH_PPC64
- MovDoubleToInt64(scratch1, input);
- rotldi(scratch1, scratch1, 1);
- cmpi(scratch1, Operand(1));
+ lgdr(scratch1, input);
+#if V8_TARGET_ARCH_S390X
+ llihf(scratch2, Operand(0x80000000)); // scratch2 = 0x80000000_00000000
+ CmpP(scratch1, scratch2);
#else
- MovDoubleToInt64(scratch1, scratch2, input);
Label done;
- cmpi(scratch2, Operand::Zero());
- bne(&done);
- lis(scratch2, Operand(SIGN_EXT_IMM16(0x8000)));
- cmp(scratch1, scratch2);
+ CmpP(scratch1, Operand::Zero());
+ bne(&done, Label::kNear);
+
+ srlg(scratch1, scratch1, Operand(32));
+ CmpP(scratch1, Operand(HeapNumber::kSignMask));
bind(&done);
#endif
}
void MacroAssembler::TestDoubleSign(DoubleRegister input, Register scratch) {
-#if V8_TARGET_ARCH_PPC64
- MovDoubleToInt64(scratch, input);
-#else
- MovDoubleHighToInt(scratch, input);
-#endif
- cmpi(scratch, Operand::Zero());
+ stdy(input, MemOperand(sp, -kDoubleSize));
+ LoadlW(scratch, MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+ Cmp32(scratch, Operand::Zero());
}
void MacroAssembler::TestHeapNumberSign(Register input, Register scratch) {
-#if V8_TARGET_ARCH_PPC64
- LoadP(scratch, FieldMemOperand(input, HeapNumber::kValueOffset));
-#else
- lwz(scratch, FieldMemOperand(input, HeapNumber::kExponentOffset));
-#endif
- cmpi(scratch, Operand::Zero());
+ LoadlW(scratch, FieldMemOperand(input, HeapNumber::kValueOffset +
+ Register::kExponentOffset));
+ Cmp32(scratch, Operand::Zero());
}
void MacroAssembler::TryDoubleToInt32Exact(Register result,
@@ -2230,12 +2188,12 @@ void MacroAssembler::TryDoubleToInt32Exact(Register result,
DCHECK(!double_input.is(double_scratch));
ConvertDoubleToInt64(double_input,
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
scratch,
#endif
result, double_scratch);
-#if V8_TARGET_ARCH_PPC64
+#if V8_TARGET_ARCH_S390X
TestIfInt32(result, r0);
#else
TestIfInt32(scratch, result, r0);
@@ -2243,12 +2201,12 @@ void MacroAssembler::TryDoubleToInt32Exact(Register result,
bne(&done);
// convert back and compare
- fcfid(double_scratch, double_scratch);
- fcmpu(double_scratch, double_input);
+ lgdr(scratch, double_scratch);
+ cdfbr(double_scratch, scratch);
+ cdbr(double_scratch, double_input);
bind(&done);
}
-
void MacroAssembler::TryInt32Floor(Register result, DoubleRegister double_input,
Register input_high, Register scratch,
DoubleRegister double_scratch, Label* done,
@@ -2257,22 +2215,26 @@ void MacroAssembler::TryInt32Floor(Register result, DoubleRegister double_input,
DCHECK(!double_input.is(double_scratch));
Label exception;
- MovDoubleHighToInt(input_high, double_input);
+ // Move high word into input_high
+ StoreDouble(double_input, MemOperand(sp, -kDoubleSize));
+ lay(sp, MemOperand(sp, -kDoubleSize));
+ LoadlW(input_high, MemOperand(sp, Register::kExponentOffset));
+ la(sp, MemOperand(sp, kDoubleSize));
// Test for NaN/Inf
ExtractBitMask(result, input_high, HeapNumber::kExponentMask);
- cmpli(result, Operand(0x7ff));
+ CmpLogicalP(result, Operand(0x7ff));
beq(&exception);
// Convert (rounding to -Inf)
ConvertDoubleToInt64(double_input,
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
scratch,
#endif
result, double_scratch, kRoundToMinusInf);
// Test for overflow
-#if V8_TARGET_ARCH_PPC64
+#if V8_TARGET_ARCH_S390X
TestIfInt32(result, r0);
#else
TestIfInt32(scratch, result, r0);
@@ -2280,31 +2242,185 @@ void MacroAssembler::TryInt32Floor(Register result, DoubleRegister double_input,
bne(&exception);
// Test for exactness
- fcfid(double_scratch, double_scratch);
- fcmpu(double_scratch, double_input);
+ lgdr(scratch, double_scratch);
+ cdfbr(double_scratch, scratch);
+ cdbr(double_scratch, double_input);
beq(exact);
b(done);
bind(&exception);
}
+void MacroAssembler::FloatCeiling32(DoubleRegister double_output,
+ DoubleRegister double_input,
+ Register scratch,
+ DoubleRegister double_scratch) {
+ Label not_zero, no_nan_inf, done, do_ceil;
+ Register scratch2 = r0;
-void MacroAssembler::TryInlineTruncateDoubleToI(Register result,
- DoubleRegister double_input,
+ // Move high word into scratch
+ MovFloatToInt(scratch, double_input);
+
+ // Test for NaN/Inf which results in NaN/Inf respectively
+ static const uint32_t float32ExponentMask = 0x7f800000u;
+ ExtractBitMask(scratch2, scratch, float32ExponentMask);
+ CmpLogical32(scratch2, Operand(0xff));
+ bne(&no_nan_inf, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&no_nan_inf);
+
+ // Test for double_input in (-1, -0) which results in -0
+ LoadFloat32Literal(double_scratch, -1.0, scratch2);
+ cebr(double_input, double_scratch);
+ ble(&do_ceil, Label::kNear);
+ Cmp32(scratch, Operand::Zero());
+ bgt(&do_ceil, Label::kNear);
+ bne(&not_zero, Label::kNear);
+
+ // double_input = +/- 0 which results in +/- 0 respectively
+ Move(double_output, double_input);
+ b(&done);
+ bind(&not_zero);
+
+ // double_output = -0
+ llihf(scratch2, Operand(0x80000000));
+ ldgr(double_output, scratch2);
+ b(&done);
+ bind(&do_ceil);
+
+ // Regular case
+ // cgdbr(Condition(6), scratch, double_input);
+ // cdfbr(double_output, scratch);
+ fiebra(double_output, double_input, FIDBRA_ROUND_TOWARD_POS_INF);
+ bind(&done);
+}
+
+void MacroAssembler::FloatFloor32(DoubleRegister double_output,
+ DoubleRegister double_input,
+ Register scratch) {
+ Label not_zero, no_nan_inf, done, do_floor;
+ Register scratch2 = r0;
+
+ // Move high word into scratch
+ MovFloatToInt(scratch, double_input);
+
+ // Test for NaN/Inf which results in NaN/Inf respectively
+ static const uint32_t float32ExponentMask = 0x7f800000u;
+ ExtractBitMask(scratch2, scratch, float32ExponentMask);
+ CmpLogical32(scratch2, Operand(0xff));
+ bne(&no_nan_inf, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&no_nan_inf);
+
+ // Test for double_input=+/- 0 which results in +/- 0 respectively
+ ltebr(double_input, double_input);
+ bne(&do_floor, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&do_floor);
+
+ // Regular case
+ // cgdbr(Condition(7), scratch, double_input);
+ // cdfbr(double_output, scratch);
+ fiebra(double_output, double_input, FIDBRA_ROUND_TOWARD_NEG_INF);
+ bind(&done);
+}
+
+void MacroAssembler::FloatCeiling64(DoubleRegister double_output,
+ DoubleRegister double_input,
+ Register scratch,
+ DoubleRegister double_scratch) {
+ Label not_zero, no_nan_inf, done, do_ceil;
+ Register scratch2 = r0;
+
+ // Move high word into scratch
+ StoreDouble(double_input, MemOperand(sp, -kDoubleSize));
+ LoadlW(scratch, MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+
+ // Test for NaN/Inf which results in NaN/Inf respectively
+ ExtractBitMask(scratch2, scratch, HeapNumber::kExponentMask);
+ CmpLogicalP(scratch2, Operand(0x7ff));
+ bne(&no_nan_inf, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&no_nan_inf);
+
+ // Test for double_input in (-1, -0) which results in -0
+ LoadDoubleLiteral(double_scratch, -1.0, scratch2);
+ cdbr(double_input, double_scratch);
+ ble(&do_ceil, Label::kNear);
+ Cmp32(scratch, Operand::Zero());
+ bgt(&do_ceil, Label::kNear);
+ bne(&not_zero, Label::kNear);
+
+ // double_input = +/- 0 which results in +/- 0 respectively
+ Move(double_output, double_input);
+ b(&done);
+ bind(&not_zero);
+
+ // double_output = -0
+ llihf(scratch2, Operand(0x80000000));
+ ldgr(double_output, scratch2);
+ b(&done);
+ bind(&do_ceil);
+
+ // Regular case
+ // cgdbr(Condition(6), scratch, double_input);
+ // cdfbr(double_output, scratch);
+ fidbra(double_output, double_input, FIDBRA_ROUND_TOWARD_POS_INF);
+ bind(&done);
+}
+
+void MacroAssembler::FloatFloor64(DoubleRegister double_output,
+ DoubleRegister double_input,
+ Register scratch) {
+ Label not_zero, no_nan_inf, done, do_floor;
+ Register scratch2 = r0;
+
+ // Move high word into scratch
+ StoreDouble(double_input, MemOperand(sp, -kDoubleSize));
+ LoadlW(scratch, MemOperand(sp, -kDoubleSize + Register::kExponentOffset));
+
+ // Test for NaN/Inf which results in NaN/Inf respectively
+ ExtractBitMask(scratch2, scratch, HeapNumber::kExponentMask);
+ CmpLogicalP(scratch2, Operand(0x7ff));
+ bne(&no_nan_inf, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&no_nan_inf);
+
+ // Test for double_input=+/- 0 which results in +/- 0 respectively
+ ltdbr(double_input, double_input);
+ bne(&do_floor, Label::kNear);
+ Move(double_output, double_input);
+ b(&done);
+ bind(&do_floor);
+
+ // Regular case
+ // cgdbr(Condition(7), scratch, double_input);
+ // cdfbr(double_output, scratch);
+ fidbra(double_output, double_input, FIDBRA_ROUND_TOWARD_NEG_INF);
+ bind(&done);
+}
+
+void MacroAssembler::TryInlineTruncateDoubleToI(Register result,
+ DoubleRegister double_input,
Label* done) {
DoubleRegister double_scratch = kScratchDoubleReg;
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
Register scratch = ip;
#endif
ConvertDoubleToInt64(double_input,
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
scratch,
#endif
result, double_scratch);
// Test for overflow
-#if V8_TARGET_ARCH_PPC64
+#if V8_TARGET_ARCH_S390X
TestIfInt32(result, r0);
#else
TestIfInt32(scratch, result, r0);
@@ -2312,7 +2428,6 @@ void MacroAssembler::TryInlineTruncateDoubleToI(Register result,
beq(done);
}
-
void MacroAssembler::TruncateDoubleToI(Register result,
DoubleRegister double_input) {
Label done;
@@ -2320,43 +2435,38 @@ void MacroAssembler::TruncateDoubleToI(Register result,
TryInlineTruncateDoubleToI(result, double_input, &done);
// If we fell through then inline version didn't succeed - call stub instead.
- mflr(r0);
- push(r0);
+ push(r14);
// Put input on stack.
- stfdu(double_input, MemOperand(sp, -kDoubleSize));
+ StoreDouble(double_input, MemOperand(sp, -kDoubleSize));
+ lay(sp, MemOperand(sp, -kDoubleSize));
DoubleToIStub stub(isolate(), sp, result, 0, true, true);
CallStub(&stub);
- addi(sp, sp, Operand(kDoubleSize));
- pop(r0);
- mtlr(r0);
+ la(sp, MemOperand(sp, kDoubleSize));
+ pop(r14);
bind(&done);
}
-
void MacroAssembler::TruncateHeapNumberToI(Register result, Register object) {
Label done;
DoubleRegister double_scratch = kScratchDoubleReg;
DCHECK(!result.is(object));
- lfd(double_scratch, FieldMemOperand(object, HeapNumber::kValueOffset));
+ LoadDouble(double_scratch, FieldMemOperand(object, HeapNumber::kValueOffset));
TryInlineTruncateDoubleToI(result, double_scratch, &done);
// If we fell through then inline version didn't succeed - call stub instead.
- mflr(r0);
- push(r0);
+ push(r14);
DoubleToIStub stub(isolate(), object, result,
HeapNumber::kValueOffset - kHeapObjectTag, true, true);
CallStub(&stub);
- pop(r0);
- mtlr(r0);
+ pop(r14);
bind(&done);
}
-
void MacroAssembler::TruncateNumberToI(Register object, Register result,
Register heap_number_map,
Register scratch1, Label* not_number) {
@@ -2370,28 +2480,26 @@ void MacroAssembler::TruncateNumberToI(Register object, Register result,
bind(&done);
}
-
void MacroAssembler::GetLeastBitsFromSmi(Register dst, Register src,
int num_least_bits) {
-#if V8_TARGET_ARCH_PPC64
- rldicl(dst, src, kBitsPerPointer - kSmiShift,
- kBitsPerPointer - num_least_bits);
-#else
- rlwinm(dst, src, kBitsPerPointer - kSmiShift,
- kBitsPerPointer - num_least_bits, 31);
-#endif
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ // We rotate by kSmiShift amount, and extract the num_least_bits
+ risbg(dst, src, Operand(64 - num_least_bits), Operand(63),
+ Operand(64 - kSmiShift), true);
+ } else {
+ SmiUntag(dst, src);
+ AndP(dst, Operand((1 << num_least_bits) - 1));
+ }
}
-
void MacroAssembler::GetLeastBitsFromInt32(Register dst, Register src,
int num_least_bits) {
- rlwinm(dst, src, 0, 32 - num_least_bits, 31);
+ AndP(dst, src, Operand((1 << num_least_bits) - 1));
}
-
void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments,
SaveFPRegsMode save_doubles) {
- // All parameters are on the stack. r3 has the return value after call.
+ // All parameters are on the stack. r2 has the return value after call.
// If the expected number of arguments of the runtime function is
// constant, we check that the actual number of arguments match the
@@ -2402,10 +2510,10 @@ void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments,
// arguments passed in because it is constant. At some point we
// should remove this need and make the runtime routine entry code
// smarter.
- mov(r3, Operand(num_arguments));
- mov(r4, Operand(ExternalReference(f, isolate())));
+ mov(r2, Operand(num_arguments));
+ mov(r3, Operand(ExternalReference(f, isolate())));
CEntryStub stub(isolate(),
-#if V8_TARGET_ARCH_PPC64
+#if V8_TARGET_ARCH_S390X
f->result_size,
#else
1,
@@ -2414,105 +2522,94 @@ void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments,
CallStub(&stub);
}
-
void MacroAssembler::CallExternalReference(const ExternalReference& ext,
int num_arguments) {
- mov(r3, Operand(num_arguments));
- mov(r4, Operand(ext));
+ mov(r2, Operand(num_arguments));
+ mov(r3, Operand(ext));
CEntryStub stub(isolate(), 1);
CallStub(&stub);
}
-
void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid) {
const Runtime::Function* function = Runtime::FunctionForId(fid);
DCHECK_EQ(1, function->result_size);
if (function->nargs >= 0) {
- mov(r3, Operand(function->nargs));
+ mov(r2, Operand(function->nargs));
}
JumpToExternalReference(ExternalReference(fid, isolate()));
}
-
void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin) {
- mov(r4, Operand(builtin));
+ mov(r3, Operand(builtin));
CEntryStub stub(isolate(), 1);
Jump(stub.GetCode(), RelocInfo::CODE_TARGET);
}
-
void MacroAssembler::SetCounter(StatsCounter* counter, int value,
Register scratch1, Register scratch2) {
if (FLAG_native_code_counters && counter->Enabled()) {
mov(scratch1, Operand(value));
mov(scratch2, Operand(ExternalReference(counter)));
- stw(scratch1, MemOperand(scratch2));
+ StoreW(scratch1, MemOperand(scratch2));
}
}
-
void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,
Register scratch1, Register scratch2) {
- DCHECK(value > 0);
+ DCHECK(value > 0 && is_int8(value));
if (FLAG_native_code_counters && counter->Enabled()) {
- mov(scratch2, Operand(ExternalReference(counter)));
- lwz(scratch1, MemOperand(scratch2));
- addi(scratch1, scratch1, Operand(value));
- stw(scratch1, MemOperand(scratch2));
+ mov(scratch1, Operand(ExternalReference(counter)));
+ // @TODO(john.yan): can be optimized by asi()
+ LoadW(scratch2, MemOperand(scratch1));
+ AddP(scratch2, Operand(value));
+ StoreW(scratch2, MemOperand(scratch1));
}
}
-
void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,
Register scratch1, Register scratch2) {
- DCHECK(value > 0);
+ DCHECK(value > 0 && is_int8(value));
if (FLAG_native_code_counters && counter->Enabled()) {
- mov(scratch2, Operand(ExternalReference(counter)));
- lwz(scratch1, MemOperand(scratch2));
- subi(scratch1, scratch1, Operand(value));
- stw(scratch1, MemOperand(scratch2));
+ mov(scratch1, Operand(ExternalReference(counter)));
+ // @TODO(john.yan): can be optimized by asi()
+ LoadW(scratch2, MemOperand(scratch1));
+ AddP(scratch2, Operand(-value));
+ StoreW(scratch2, MemOperand(scratch1));
}
}
-
void MacroAssembler::Assert(Condition cond, BailoutReason reason,
CRegister cr) {
if (emit_debug_code()) Check(cond, reason, cr);
}
-
void MacroAssembler::AssertFastElements(Register elements) {
if (emit_debug_code()) {
DCHECK(!elements.is(r0));
Label ok;
push(elements);
LoadP(elements, FieldMemOperand(elements, HeapObject::kMapOffset));
- LoadRoot(r0, Heap::kFixedArrayMapRootIndex);
- cmp(elements, r0);
- beq(&ok);
- LoadRoot(r0, Heap::kFixedDoubleArrayMapRootIndex);
- cmp(elements, r0);
- beq(&ok);
- LoadRoot(r0, Heap::kFixedCOWArrayMapRootIndex);
- cmp(elements, r0);
- beq(&ok);
+ CompareRoot(elements, Heap::kFixedArrayMapRootIndex);
+ beq(&ok, Label::kNear);
+ CompareRoot(elements, Heap::kFixedDoubleArrayMapRootIndex);
+ beq(&ok, Label::kNear);
+ CompareRoot(elements, Heap::kFixedCOWArrayMapRootIndex);
+ beq(&ok, Label::kNear);
Abort(kJSObjectWithFastElementsMapHasSlowElements);
bind(&ok);
pop(elements);
}
}
-
void MacroAssembler::Check(Condition cond, BailoutReason reason, CRegister cr) {
Label L;
- b(cond, &L, cr);
+ b(cond, &L);
Abort(reason);
// will not return here
bind(&L);
}
-
void MacroAssembler::Abort(BailoutReason reason) {
Label abort_start;
bind(&abort_start);
@@ -2543,7 +2640,6 @@ void MacroAssembler::Abort(BailoutReason reason) {
// will not return here
}
-
void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
if (context_chain_length > 0) {
// Move up the chain of contexts to the context containing the slot.
@@ -2555,11 +2651,10 @@ void MacroAssembler::LoadContext(Register dst, int context_chain_length) {
// Slot is in the current function context. Move it into the
// destination register in case we store into it (the write barrier
// cannot be allowed to destroy the context in esi).
- mr(dst, cp);
+ LoadRR(dst, cp);
}
}
-
void MacroAssembler::LoadTransitionedArrayMapConditional(
ElementsKind expected_kind, ElementsKind transitioned_kind,
Register map_in_out, Register scratch, Label* no_map_match) {
@@ -2569,7 +2664,7 @@ void MacroAssembler::LoadTransitionedArrayMapConditional(
// Check that the function's map is the same as the expected cached map.
LoadP(scratch, NativeContextMemOperand());
LoadP(ip, ContextMemOperand(scratch, Context::ArrayMapIndex(expected_kind)));
- cmp(map_in_out, ip);
+ CmpP(map_in_out, ip);
bne(no_map_match);
// Use the transitioned cached map.
@@ -2577,13 +2672,11 @@ void MacroAssembler::LoadTransitionedArrayMapConditional(
ContextMemOperand(scratch, Context::ArrayMapIndex(transitioned_kind)));
}
-
void MacroAssembler::LoadNativeContextSlot(int index, Register dst) {
LoadP(dst, NativeContextMemOperand());
LoadP(dst, ContextMemOperand(dst, index));
}
-
void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
Register map,
Register scratch) {
@@ -2600,37 +2693,35 @@ void MacroAssembler::LoadGlobalFunctionInitialMap(Register function,
}
}
-
void MacroAssembler::JumpIfNotPowerOfTwoOrZero(
Register reg, Register scratch, Label* not_power_of_two_or_zero) {
- subi(scratch, reg, Operand(1));
- cmpi(scratch, Operand::Zero());
+ SubP(scratch, reg, Operand(1));
+ CmpP(scratch, Operand::Zero());
blt(not_power_of_two_or_zero);
- and_(r0, scratch, reg, SetRC);
- bne(not_power_of_two_or_zero, cr0);
+ AndP(r0, reg, scratch /*, SetRC*/); // Should be okay to remove rc
+ bne(not_power_of_two_or_zero /*, cr0*/);
}
-
void MacroAssembler::JumpIfNotPowerOfTwoOrZeroAndNeg(Register reg,
Register scratch,
Label* zero_and_neg,
Label* not_power_of_two) {
- subi(scratch, reg, Operand(1));
- cmpi(scratch, Operand::Zero());
+ SubP(scratch, reg, Operand(1));
+ CmpP(scratch, Operand::Zero());
blt(zero_and_neg);
- and_(r0, scratch, reg, SetRC);
- bne(not_power_of_two, cr0);
+ AndP(r0, reg, scratch /*, SetRC*/); // Should be okay to remove rc
+ bne(not_power_of_two /*, cr0*/);
}
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
void MacroAssembler::SmiTagCheckOverflow(Register reg, Register overflow) {
DCHECK(!reg.is(overflow));
- mr(overflow, reg); // Save original value.
+ LoadRR(overflow, reg); // Save original value.
SmiTag(reg);
- xor_(overflow, overflow, reg, SetRC); // Overflow if (value ^ 2 * value) < 0.
+ XorP(overflow, overflow, reg); // Overflow if (value ^ 2 * value) < 0.
+ LoadAndTestRR(overflow, overflow);
}
-
void MacroAssembler::SmiTagCheckOverflow(Register dst, Register src,
Register overflow) {
if (dst.is(src)) {
@@ -2641,7 +2732,8 @@ void MacroAssembler::SmiTagCheckOverflow(Register dst, Register src,
DCHECK(!dst.is(overflow));
DCHECK(!src.is(overflow));
SmiTag(dst, src);
- xor_(overflow, dst, src, SetRC); // Overflow if (value ^ 2 * value) < 0.
+ XorP(overflow, dst, src); // Overflow if (value ^ 2 * value) < 0.
+ LoadAndTestRR(overflow, overflow);
}
}
#endif
@@ -2649,29 +2741,40 @@ void MacroAssembler::SmiTagCheckOverflow(Register dst, Register src,
void MacroAssembler::JumpIfNotBothSmi(Register reg1, Register reg2,
Label* on_not_both_smi) {
STATIC_ASSERT(kSmiTag == 0);
- orx(r0, reg1, reg2, LeaveRC);
+ OrP(r0, reg1, reg2 /*, LeaveRC*/); // should be okay to remove LeaveRC
JumpIfNotSmi(r0, on_not_both_smi);
}
-
void MacroAssembler::UntagAndJumpIfSmi(Register dst, Register src,
Label* smi_case) {
STATIC_ASSERT(kSmiTag == 0);
- TestBitRange(src, kSmiTagSize - 1, 0, r0);
+ STATIC_ASSERT(kSmiTagSize == 1);
+ // this won't work if src == dst
+ DCHECK(src.code() != dst.code());
SmiUntag(dst, src);
- beq(smi_case, cr0);
+ TestIfSmi(src);
+ beq(smi_case);
}
-
void MacroAssembler::UntagAndJumpIfNotSmi(Register dst, Register src,
Label* non_smi_case) {
STATIC_ASSERT(kSmiTag == 0);
- TestBitRange(src, kSmiTagSize - 1, 0, r0);
- SmiUntag(dst, src);
- bne(non_smi_case, cr0);
+ STATIC_ASSERT(kSmiTagSize == 1);
+
+ // We can more optimally use TestIfSmi if dst != src
+ // otherwise, the UnTag operation will kill the CC and we cannot
+ // test the Tag bit.
+ if (src.code() != dst.code()) {
+ SmiUntag(dst, src);
+ TestIfSmi(src);
+ } else {
+ TestBit(src, 0, r0);
+ SmiUntag(dst, src);
+ LoadAndTestRR(r0, r0);
+ }
+ bne(non_smi_case);
}
-
void MacroAssembler::JumpIfEitherSmi(Register reg1, Register reg2,
Label* on_either_smi) {
STATIC_ASSERT(kSmiTag == 0);
@@ -2679,29 +2782,26 @@ void MacroAssembler::JumpIfEitherSmi(Register reg1, Register reg2,
JumpIfSmi(reg2, on_either_smi);
}
-
void MacroAssembler::AssertNotSmi(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(ne, kOperandIsASmi, cr0);
}
}
-
void MacroAssembler::AssertSmi(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(eq, kOperandIsNotSmi, cr0);
}
}
-
void MacroAssembler::AssertString(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(ne, kOperandIsASmiAndNotAString, cr0);
push(object);
LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
@@ -2711,11 +2811,10 @@ void MacroAssembler::AssertString(Register object) {
}
}
-
void MacroAssembler::AssertName(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(ne, kOperandIsASmiAndNotAName, cr0);
push(object);
LoadP(object, FieldMemOperand(object, HeapObject::kMapOffset));
@@ -2725,11 +2824,10 @@ void MacroAssembler::AssertName(Register object) {
}
}
-
void MacroAssembler::AssertFunction(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(ne, kOperandIsASmiAndNotAFunction, cr0);
push(object);
CompareObjectType(object, object, object, JS_FUNCTION_TYPE);
@@ -2738,11 +2836,10 @@ void MacroAssembler::AssertFunction(Register object) {
}
}
-
void MacroAssembler::AssertBoundFunction(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(ne, kOperandIsASmiAndNotABoundFunction, cr0);
push(object);
CompareObjectType(object, object, object, JS_BOUND_FUNCTION_TYPE);
@@ -2754,7 +2851,7 @@ void MacroAssembler::AssertBoundFunction(Register object) {
void MacroAssembler::AssertReceiver(Register object) {
if (emit_debug_code()) {
STATIC_ASSERT(kSmiTag == 0);
- TestIfSmi(object, r0);
+ TestIfSmi(object);
Check(ne, kOperandIsASmiAndNotAReceiver, cr0);
push(object);
STATIC_ASSERT(LAST_TYPE == LAST_JS_RECEIVER_TYPE);
@@ -2770,7 +2867,7 @@ void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
Label done_checking;
AssertNotSmi(object);
CompareRoot(object, Heap::kUndefinedValueRootIndex);
- beq(&done_checking);
+ beq(&done_checking, Label::kNear);
LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
CompareRoot(scratch, Heap::kAllocationSiteMapRootIndex);
Assert(eq, kExpectedUndefinedOrCell);
@@ -2778,7 +2875,6 @@ void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
}
}
-
void MacroAssembler::AssertIsRoot(Register reg, Heap::RootListIndex index) {
if (emit_debug_code()) {
CompareRoot(reg, index);
@@ -2786,18 +2882,16 @@ void MacroAssembler::AssertIsRoot(Register reg, Heap::RootListIndex index) {
}
}
-
void MacroAssembler::JumpIfNotHeapNumber(Register object,
Register heap_number_map,
Register scratch,
Label* on_not_heap_number) {
LoadP(scratch, FieldMemOperand(object, HeapObject::kMapOffset));
AssertIsRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
- cmp(scratch, heap_number_map);
+ CmpP(scratch, heap_number_map);
bne(on_not_heap_number);
}
-
void MacroAssembler::JumpIfNonSmisNotBothSequentialOneByteStrings(
Register first, Register second, Register scratch1, Register scratch2,
Label* failure) {
@@ -2805,8 +2899,8 @@ void MacroAssembler::JumpIfNonSmisNotBothSequentialOneByteStrings(
// Assume that they are non-smis.
LoadP(scratch1, FieldMemOperand(first, HeapObject::kMapOffset));
LoadP(scratch2, FieldMemOperand(second, HeapObject::kMapOffset));
- lbz(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
- lbz(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
+ LoadlB(scratch1, FieldMemOperand(scratch1, Map::kInstanceTypeOffset));
+ LoadlB(scratch2, FieldMemOperand(scratch2, Map::kInstanceTypeOffset));
JumpIfBothInstanceTypesAreNotSequentialOneByte(scratch1, scratch2, scratch1,
scratch2, failure);
@@ -2818,26 +2912,24 @@ void MacroAssembler::JumpIfNotBothSequentialOneByteStrings(Register first,
Register scratch2,
Label* failure) {
// Check that neither is a smi.
- and_(scratch1, first, second);
+ AndP(scratch1, first, second);
JumpIfSmi(scratch1, failure);
JumpIfNonSmisNotBothSequentialOneByteStrings(first, second, scratch1,
scratch2, failure);
}
-
void MacroAssembler::JumpIfNotUniqueNameInstanceType(Register reg,
Label* not_unique_name) {
STATIC_ASSERT(kInternalizedTag == 0 && kStringTag == 0);
Label succeed;
- andi(r0, reg, Operand(kIsNotStringMask | kIsNotInternalizedMask));
- beq(&succeed, cr0);
- cmpi(reg, Operand(SYMBOL_TYPE));
+ AndP(r0, reg, Operand(kIsNotStringMask | kIsNotInternalizedMask));
+ beq(&succeed, Label::kNear);
+ CmpP(reg, Operand(SYMBOL_TYPE));
bne(not_unique_name);
bind(&succeed);
}
-
// Allocates a heap number or jumps to the need_gc label if the young space
// is full and a scavenge is needed.
void MacroAssembler::AllocateHeapNumber(Register result, Register scratch1,
@@ -2858,22 +2950,19 @@ void MacroAssembler::AllocateHeapNumber(Register result, Register scratch1,
// Store heap number map in the allocated object.
if (tagging_mode == TAG_RESULT) {
- StoreP(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset),
- r0);
+ StoreP(heap_number_map, FieldMemOperand(result, HeapObject::kMapOffset));
} else {
StoreP(heap_number_map, MemOperand(result, HeapObject::kMapOffset));
}
}
-
void MacroAssembler::AllocateHeapNumberWithValue(
Register result, DoubleRegister value, Register scratch1, Register scratch2,
Register heap_number_map, Label* gc_required) {
AllocateHeapNumber(result, scratch1, scratch2, heap_number_map, gc_required);
- stfd(value, FieldMemOperand(result, HeapNumber::kValueOffset));
+ StoreDouble(value, FieldMemOperand(result, HeapNumber::kValueOffset));
}
-
void MacroAssembler::AllocateJSValue(Register result, Register constructor,
Register value, Register scratch1,
Register scratch2, Label* gc_required) {
@@ -2895,137 +2984,75 @@ void MacroAssembler::AllocateJSValue(Register result, Register constructor,
STATIC_ASSERT(JSValue::kSize == 4 * kPointerSize);
}
-
void MacroAssembler::CopyBytes(Register src, Register dst, Register length,
Register scratch) {
- Label align_loop, aligned, word_loop, byte_loop, byte_loop_1, done;
+ Label big_loop, left_bytes, done, fake_call;
DCHECK(!scratch.is(r0));
- cmpi(length, Operand::Zero());
- beq(&done);
+ // big loop moves 256 bytes at a time
+ bind(&big_loop);
+ CmpP(length, Operand(static_cast<intptr_t>(0x100)));
+ blt(&left_bytes);
- // Check src alignment and length to see whether word_loop is possible
- andi(scratch, src, Operand(kPointerSize - 1));
- beq(&aligned, cr0);
- subfic(scratch, scratch, Operand(kPointerSize * 2));
- cmp(length, scratch);
- blt(&byte_loop);
-
- // Align src before copying in word size chunks.
- subi(scratch, scratch, Operand(kPointerSize));
- mtctr(scratch);
- bind(&align_loop);
- lbz(scratch, MemOperand(src));
- addi(src, src, Operand(1));
- subi(length, length, Operand(1));
- stb(scratch, MemOperand(dst));
- addi(dst, dst, Operand(1));
- bdnz(&align_loop);
-
- bind(&aligned);
-
- // Copy bytes in word size chunks.
- if (emit_debug_code()) {
- andi(r0, src, Operand(kPointerSize - 1));
- Assert(eq, kExpectingAlignmentForCopyBytes, cr0);
- }
-
- ShiftRightImm(scratch, length, Operand(kPointerSizeLog2));
- cmpi(scratch, Operand::Zero());
- beq(&byte_loop);
-
- mtctr(scratch);
- bind(&word_loop);
- LoadP(scratch, MemOperand(src));
- addi(src, src, Operand(kPointerSize));
- subi(length, length, Operand(kPointerSize));
- if (CpuFeatures::IsSupported(UNALIGNED_ACCESSES)) {
- // currently false for PPC - but possible future opt
- StoreP(scratch, MemOperand(dst));
- addi(dst, dst, Operand(kPointerSize));
- } else {
-#if V8_TARGET_LITTLE_ENDIAN
- stb(scratch, MemOperand(dst, 0));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 1));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 2));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 3));
-#if V8_TARGET_ARCH_PPC64
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 4));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 5));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 6));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 7));
-#endif
-#else
-#if V8_TARGET_ARCH_PPC64
- stb(scratch, MemOperand(dst, 7));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 6));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 5));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 4));
- ShiftRightImm(scratch, scratch, Operand(8));
-#endif
- stb(scratch, MemOperand(dst, 3));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 2));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 1));
- ShiftRightImm(scratch, scratch, Operand(8));
- stb(scratch, MemOperand(dst, 0));
-#endif
- addi(dst, dst, Operand(kPointerSize));
- }
- bdnz(&word_loop);
+ mvc(MemOperand(dst), MemOperand(src), 0x100);
- // Copy the last bytes if any left.
- cmpi(length, Operand::Zero());
- beq(&done);
+ AddP(src, Operand(static_cast<intptr_t>(0x100)));
+ AddP(dst, Operand(static_cast<intptr_t>(0x100)));
+ SubP(length, Operand(static_cast<intptr_t>(0x100)));
+ b(&big_loop);
- bind(&byte_loop);
- mtctr(length);
- bind(&byte_loop_1);
- lbz(scratch, MemOperand(src));
- addi(src, src, Operand(1));
- stb(scratch, MemOperand(dst));
- addi(dst, dst, Operand(1));
- bdnz(&byte_loop_1);
+ bind(&left_bytes);
+ CmpP(length, Operand::Zero());
+ beq(&done);
+ // TODO(john.yan): More optimal version is to use MVC
+ // Sequence below has some undiagnosed issue.
+ /*
+ b(scratch, &fake_call); // use brasl to Save mvc addr to scratch
+ mvc(MemOperand(dst), MemOperand(src), 1);
+ bind(&fake_call);
+ SubP(length, Operand(static_cast<intptr_t>(-1)));
+ ex(length, MemOperand(scratch)); // execute mvc instr above
+ AddP(src, length);
+ AddP(dst, length);
+ AddP(src, Operand(static_cast<intptr_t>(0x1)));
+ AddP(dst, Operand(static_cast<intptr_t>(0x1)));
+ */
+
+ mvc(MemOperand(dst), MemOperand(src), 1);
+ AddP(src, Operand(static_cast<intptr_t>(0x1)));
+ AddP(dst, Operand(static_cast<intptr_t>(0x1)));
+ SubP(length, Operand(static_cast<intptr_t>(0x1)));
+
+ b(&left_bytes);
bind(&done);
}
-
void MacroAssembler::InitializeNFieldsWithFiller(Register current_address,
Register count,
Register filler) {
Label loop;
- mtctr(count);
bind(&loop);
StoreP(filler, MemOperand(current_address));
- addi(current_address, current_address, Operand(kPointerSize));
- bdnz(&loop);
+ AddP(current_address, current_address, Operand(kPointerSize));
+ BranchOnCount(r1, &loop);
}
void MacroAssembler::InitializeFieldsWithFiller(Register current_address,
Register end_address,
Register filler) {
Label done;
- sub(r0, end_address, current_address, LeaveOE, SetRC);
- beq(&done, cr0);
- ShiftRightImm(r0, r0, Operand(kPointerSizeLog2));
- InitializeNFieldsWithFiller(current_address, r0, filler);
+ DCHECK(!filler.is(r1));
+ DCHECK(!current_address.is(r1));
+ DCHECK(!end_address.is(r1));
+ SubP(r1, end_address, current_address /*, LeaveOE, SetRC*/);
+ beq(&done, Label::kNear);
+ ShiftRightP(r1, r1, Operand(kPointerSizeLog2));
+ InitializeNFieldsWithFiller(current_address, r1, filler);
bind(&done);
}
-
void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialOneByte(
Register first, Register second, Register scratch1, Register scratch2,
Label* failure) {
@@ -3033,15 +3060,16 @@ void MacroAssembler::JumpIfBothInstanceTypesAreNotSequentialOneByte(
kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
const int kFlatOneByteStringTag =
kStringTag | kOneByteStringTag | kSeqStringTag;
- andi(scratch1, first, Operand(kFlatOneByteStringMask));
- andi(scratch2, second, Operand(kFlatOneByteStringMask));
- cmpi(scratch1, Operand(kFlatOneByteStringTag));
+ if (!scratch1.is(first)) LoadRR(scratch1, first);
+ if (!scratch2.is(second)) LoadRR(scratch2, second);
+ nilf(scratch1, Operand(kFlatOneByteStringMask));
+ CmpP(scratch1, Operand(kFlatOneByteStringTag));
bne(failure);
- cmpi(scratch2, Operand(kFlatOneByteStringTag));
+ nilf(scratch2, Operand(kFlatOneByteStringMask));
+ CmpP(scratch2, Operand(kFlatOneByteStringTag));
bne(failure);
}
-
void MacroAssembler::JumpIfInstanceTypeIsNotSequentialOneByte(Register type,
Register scratch,
Label* failure) {
@@ -3049,13 +3077,14 @@ void MacroAssembler::JumpIfInstanceTypeIsNotSequentialOneByte(Register type,
kIsNotStringMask | kStringEncodingMask | kStringRepresentationMask;
const int kFlatOneByteStringTag =
kStringTag | kOneByteStringTag | kSeqStringTag;
- andi(scratch, type, Operand(kFlatOneByteStringMask));
- cmpi(scratch, Operand(kFlatOneByteStringTag));
+
+ if (!scratch.is(type)) LoadRR(scratch, type);
+ nilf(scratch, Operand(kFlatOneByteStringMask));
+ CmpP(scratch, Operand(kFlatOneByteStringTag));
bne(failure);
}
-static const int kRegisterPassedArguments = 8;
-
+static const int kRegisterPassedArguments = 5;
int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
int num_double_arguments) {
@@ -3064,37 +3093,36 @@ int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
stack_passed_words +=
2 * (num_double_arguments - DoubleRegister::kNumRegisters);
}
- // Up to 8 simple arguments are passed in registers r3..r10.
+ // Up to five simple arguments are passed in registers r2..r6
if (num_reg_arguments > kRegisterPassedArguments) {
stack_passed_words += num_reg_arguments - kRegisterPassedArguments;
}
return stack_passed_words;
}
-
void MacroAssembler::EmitSeqStringSetCharCheck(Register string, Register index,
Register value,
uint32_t encoding_mask) {
Label is_object;
- TestIfSmi(string, r0);
+ TestIfSmi(string);
Check(ne, kNonObject, cr0);
LoadP(ip, FieldMemOperand(string, HeapObject::kMapOffset));
- lbz(ip, FieldMemOperand(ip, Map::kInstanceTypeOffset));
+ LoadlB(ip, FieldMemOperand(ip, Map::kInstanceTypeOffset));
- andi(ip, ip, Operand(kStringRepresentationMask | kStringEncodingMask));
- cmpi(ip, Operand(encoding_mask));
+ AndP(ip, Operand(kStringRepresentationMask | kStringEncodingMask));
+ CmpP(ip, Operand(encoding_mask));
Check(eq, kUnexpectedStringType);
// The index is assumed to be untagged coming in, tag it to compare with the
// string length without using a temp register, it is restored at the end of
// this function.
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
Label index_tag_ok, index_tag_bad;
JumpIfNotSmiCandidate(index, r0, &index_tag_bad);
#endif
SmiTag(index, index);
-#if !V8_TARGET_ARCH_PPC64
+#if !V8_TARGET_ARCH_S390X
b(&index_tag_ok);
bind(&index_tag_bad);
Abort(kIndexIsTooLarge);
@@ -3102,17 +3130,16 @@ void MacroAssembler::EmitSeqStringSetCharCheck(Register string, Register index,
#endif
LoadP(ip, FieldMemOperand(string, String::kLengthOffset));
- cmp(index, ip);
+ CmpP(index, ip);
Check(lt, kIndexIsTooLarge);
DCHECK(Smi::FromInt(0) == 0);
- cmpi(index, Operand::Zero());
+ CmpP(index, Operand::Zero());
Check(ge, kIndexIsNegative);
SmiUntag(index, index);
}
-
void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
int num_double_arguments,
Register scratch) {
@@ -3120,51 +3147,41 @@ void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
int stack_passed_arguments =
CalculateStackPassedWords(num_reg_arguments, num_double_arguments);
int stack_space = kNumRequiredStackFrameSlots;
-
if (frame_alignment > kPointerSize) {
// Make stack end at alignment and make room for stack arguments
// -- preserving original value of sp.
- mr(scratch, sp);
- addi(sp, sp, Operand(-(stack_passed_arguments + 1) * kPointerSize));
+ LoadRR(scratch, sp);
+ lay(sp, MemOperand(sp, -(stack_passed_arguments + 1) * kPointerSize));
DCHECK(base::bits::IsPowerOfTwo32(frame_alignment));
ClearRightImm(sp, sp, Operand(WhichPowerOf2(frame_alignment)));
- StoreP(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));
+ StoreP(scratch, MemOperand(sp, (stack_passed_arguments)*kPointerSize));
} else {
- // Make room for stack arguments
stack_space += stack_passed_arguments;
}
-
- // Allocate frame with required slots to make ABI work.
- li(r0, Operand::Zero());
- StorePU(r0, MemOperand(sp, -stack_space * kPointerSize));
+ lay(sp, MemOperand(sp, -(stack_space)*kPointerSize));
}
-
void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,
Register scratch) {
PrepareCallCFunction(num_reg_arguments, 0, scratch);
}
+void MacroAssembler::MovToFloatParameter(DoubleRegister src) { Move(d0, src); }
-void MacroAssembler::MovToFloatParameter(DoubleRegister src) { Move(d1, src); }
-
-
-void MacroAssembler::MovToFloatResult(DoubleRegister src) { Move(d1, src); }
-
+void MacroAssembler::MovToFloatResult(DoubleRegister src) { Move(d0, src); }
void MacroAssembler::MovToFloatParameters(DoubleRegister src1,
DoubleRegister src2) {
- if (src2.is(d1)) {
+ if (src2.is(d0)) {
DCHECK(!src1.is(d2));
Move(d2, src2);
- Move(d1, src1);
+ Move(d0, src1);
} else {
- Move(d1, src1);
+ Move(d0, src1);
Move(d2, src2);
}
}
-
void MacroAssembler::CallCFunction(ExternalReference function,
int num_reg_arguments,
int num_double_arguments) {
@@ -3172,24 +3189,20 @@ void MacroAssembler::CallCFunction(ExternalReference function,
CallCFunctionHelper(ip, num_reg_arguments, num_double_arguments);
}
-
void MacroAssembler::CallCFunction(Register function, int num_reg_arguments,
int num_double_arguments) {
CallCFunctionHelper(function, num_reg_arguments, num_double_arguments);
}
-
void MacroAssembler::CallCFunction(ExternalReference function,
int num_arguments) {
CallCFunction(function, num_arguments, 0);
}
-
void MacroAssembler::CallCFunction(Register function, int num_arguments) {
CallCFunction(function, num_arguments, 0);
}
-
void MacroAssembler::CallCFunctionHelper(Register function,
int num_reg_arguments,
int num_double_arguments) {
@@ -3199,86 +3212,75 @@ void MacroAssembler::CallCFunctionHelper(Register function,
// allow preemption, so the return address in the link register
// stays correct.
Register dest = function;
- if (ABI_USES_FUNCTION_DESCRIPTORS) {
- // AIX/PPC64BE Linux uses a function descriptor. When calling C code be
- // aware of this descriptor and pick up values from it
- LoadP(ToRegister(ABI_TOC_REGISTER), MemOperand(function, kPointerSize));
- LoadP(ip, MemOperand(function, 0));
- dest = ip;
- } else if (ABI_CALL_VIA_IP) {
+ if (ABI_CALL_VIA_IP) {
Move(ip, function);
dest = ip;
}
Call(dest);
- // Remove frame bought in PrepareCallCFunction
int stack_passed_arguments =
CalculateStackPassedWords(num_reg_arguments, num_double_arguments);
int stack_space = kNumRequiredStackFrameSlots + stack_passed_arguments;
if (ActivationFrameAlignment() > kPointerSize) {
+ // Load the original stack pointer (pre-alignment) from the stack
LoadP(sp, MemOperand(sp, stack_space * kPointerSize));
} else {
- addi(sp, sp, Operand(stack_space * kPointerSize));
+ la(sp, MemOperand(sp, stack_space * kPointerSize));
}
}
-
-void MacroAssembler::DecodeConstantPoolOffset(Register result,
- Register location) {
- Label overflow_access, done;
- DCHECK(!AreAliased(result, location, r0));
-
- // Determine constant pool access type
- // Caller has already placed the instruction word at location in result.
- ExtractBitRange(r0, result, 31, 26);
- cmpi(r0, Operand(ADDIS >> 26));
- beq(&overflow_access);
-
- // Regular constant pool access
- // extract the load offset
- andi(result, result, Operand(kImm16Mask));
- b(&done);
-
- bind(&overflow_access);
- // Overflow constant pool access
- // shift addis immediate
- slwi(r0, result, Operand(16));
- // sign-extend and add the load offset
- lwz(result, MemOperand(location, kInstrSize));
- extsh(result, result);
- add(result, r0, result);
-
- bind(&done);
-}
-
-
void MacroAssembler::CheckPageFlag(
Register object,
Register scratch, // scratch may be same register as object
int mask, Condition cc, Label* condition_met) {
DCHECK(cc == ne || cc == eq);
ClearRightImm(scratch, object, Operand(kPageSizeBits));
- LoadP(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
- And(r0, scratch, Operand(mask), SetRC);
+ if (base::bits::IsPowerOfTwo32(mask)) {
+ // If it's a power of two, we can use Test-Under-Mask Memory-Imm form
+ // which allows testing of a single byte in memory.
+ int32_t byte_offset = 4;
+ uint32_t shifted_mask = mask;
+ // Determine the byte offset to be tested
+ if (mask <= 0x80) {
+ byte_offset = kPointerSize - 1;
+ } else if (mask < 0x8000) {
+ byte_offset = kPointerSize - 2;
+ shifted_mask = mask >> 8;
+ } else if (mask < 0x800000) {
+ byte_offset = kPointerSize - 3;
+ shifted_mask = mask >> 16;
+ } else {
+ byte_offset = kPointerSize - 4;
+ shifted_mask = mask >> 24;
+ }
+#if V8_TARGET_LITTLE_ENDIAN
+ // Reverse the byte_offset if emulating on little endian platform
+ byte_offset = kPointerSize - byte_offset - 1;
+#endif
+ tm(MemOperand(scratch, MemoryChunk::kFlagsOffset + byte_offset),
+ Operand(shifted_mask));
+ } else {
+ LoadP(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset));
+ AndP(r0, scratch, Operand(mask));
+ }
+ // Should be okay to remove rc
if (cc == ne) {
- bne(condition_met, cr0);
+ bne(condition_met);
}
if (cc == eq) {
- beq(condition_met, cr0);
+ beq(condition_met);
}
}
-
void MacroAssembler::JumpIfBlack(Register object, Register scratch0,
Register scratch1, Label* on_black) {
HasColor(object, scratch0, scratch1, on_black, 1, 1); // kBlackBitPattern.
DCHECK(strcmp(Marking::kBlackBitPattern, "11") == 0);
}
-
void MacroAssembler::HasColor(Register object, Register bitmap_scratch,
Register mask_scratch, Label* has_color,
int first_bit, int second_bit) {
@@ -3287,43 +3289,43 @@ void MacroAssembler::HasColor(Register object, Register bitmap_scratch,
GetMarkBits(object, bitmap_scratch, mask_scratch);
Label other_color, word_boundary;
- lwz(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+ LoadlW(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
// Test the first bit
- and_(r0, ip, mask_scratch, SetRC);
- b(first_bit == 1 ? eq : ne, &other_color, cr0);
+ AndP(r0, ip, mask_scratch /*, SetRC*/); // Should be okay to remove rc
+ b(first_bit == 1 ? eq : ne, &other_color, Label::kNear);
// Shift left 1
// May need to load the next cell
- slwi(mask_scratch, mask_scratch, Operand(1), SetRC);
- beq(&word_boundary, cr0);
+ sll(mask_scratch, Operand(1) /*, SetRC*/);
+ LoadAndTest32(mask_scratch, mask_scratch);
+ beq(&word_boundary, Label::kNear);
// Test the second bit
- and_(r0, ip, mask_scratch, SetRC);
- b(second_bit == 1 ? ne : eq, has_color, cr0);
- b(&other_color);
+ AndP(r0, ip, mask_scratch /*, SetRC*/); // Should be okay to remove rc
+ b(second_bit == 1 ? ne : eq, has_color);
+ b(&other_color, Label::kNear);
bind(&word_boundary);
- lwz(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize + kIntSize));
- andi(r0, ip, Operand(1));
- b(second_bit == 1 ? ne : eq, has_color, cr0);
+ LoadlW(ip, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize + kIntSize));
+ AndP(r0, ip, Operand(1));
+ b(second_bit == 1 ? ne : eq, has_color);
bind(&other_color);
}
-
void MacroAssembler::GetMarkBits(Register addr_reg, Register bitmap_reg,
Register mask_reg) {
DCHECK(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));
- DCHECK((~Page::kPageAlignmentMask & 0xffff) == 0);
- lis(r0, Operand((~Page::kPageAlignmentMask >> 16)));
- and_(bitmap_reg, addr_reg, r0);
+ LoadRR(bitmap_reg, addr_reg);
+ nilf(bitmap_reg, Operand(~Page::kPageAlignmentMask));
const int kLowBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;
ExtractBitRange(mask_reg, addr_reg, kLowBits - 1, kPointerSizeLog2);
ExtractBitRange(ip, addr_reg, kPageSizeBits - 1, kLowBits);
- ShiftLeftImm(ip, ip, Operand(Bitmap::kBytesPerCellLog2));
- add(bitmap_reg, bitmap_reg, ip);
- li(ip, Operand(1));
- slw(mask_reg, ip, mask_reg);
+ ShiftLeftP(ip, ip, Operand(Bitmap::kBytesPerCellLog2));
+ AddP(bitmap_reg, ip);
+ LoadRR(ip, mask_reg); // Have to do some funky reg shuffling as
+ // 31-bit shift left clobbers on s390.
+ LoadImmP(mask_reg, Operand(1));
+ ShiftLeftP(mask_reg, mask_reg, ip);
}
-
void MacroAssembler::JumpIfWhite(Register value, Register bitmap_scratch,
Register mask_scratch, Register load_scratch,
Label* value_is_white) {
@@ -3338,12 +3340,12 @@ void MacroAssembler::JumpIfWhite(Register value, Register bitmap_scratch,
// Since both black and grey have a 1 in the first position and white does
// not have a 1 there we only need to check one bit.
- lwz(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
- and_(r0, mask_scratch, load_scratch, SetRC);
- beq(value_is_white, cr0);
+ LoadlW(load_scratch, MemOperand(bitmap_scratch, MemoryChunk::kHeaderSize));
+ LoadRR(r0, load_scratch);
+ AndP(r0, mask_scratch);
+ beq(value_is_white);
}
-
// Saturate a value into 8-bit unsigned integer
// if input_value < 0, output_value is 0
// if input_value > 255, output_value is 255
@@ -3351,47 +3353,27 @@ void MacroAssembler::JumpIfWhite(Register value, Register bitmap_scratch,
void MacroAssembler::ClampUint8(Register output_reg, Register input_reg) {
int satval = (1 << 8) - 1;
- if (CpuFeatures::IsSupported(ISELECT)) {
- // set to 0 if negative
- cmpi(input_reg, Operand::Zero());
- isel(lt, output_reg, r0, input_reg);
-
- // set to satval if > satval
- li(r0, Operand(satval));
- cmpi(output_reg, Operand(satval));
- isel(lt, output_reg, output_reg, r0);
- } else {
- Label done, negative_label, overflow_label;
- cmpi(input_reg, Operand::Zero());
- blt(&negative_label);
-
- cmpi(input_reg, Operand(satval));
- bgt(&overflow_label);
- if (!output_reg.is(input_reg)) {
- mr(output_reg, input_reg);
- }
- b(&done);
-
- bind(&negative_label);
- li(output_reg, Operand::Zero()); // set to 0 if negative
- b(&done);
-
- bind(&overflow_label); // set to satval if > satval
- li(output_reg, Operand(satval));
+ Label done, negative_label, overflow_label;
+ CmpP(input_reg, Operand::Zero());
+ blt(&negative_label);
- bind(&done);
+ CmpP(input_reg, Operand(satval));
+ bgt(&overflow_label);
+ if (!output_reg.is(input_reg)) {
+ LoadRR(output_reg, input_reg);
}
-}
-
+ b(&done);
-void MacroAssembler::SetRoundingMode(FPRoundingMode RN) { mtfsfi(7, RN); }
+ bind(&negative_label);
+ LoadImmP(output_reg, Operand::Zero()); // set to 0 if negative
+ b(&done);
+ bind(&overflow_label); // set to satval if > satval
+ LoadImmP(output_reg, Operand(satval));
-void MacroAssembler::ResetRoundingMode() {
- mtfsfi(7, kRoundToNearest); // reset (default is kRoundToNearest)
+ bind(&done);
}
-
void MacroAssembler::ClampDoubleToUint8(Register result_reg,
DoubleRegister input_reg,
DoubleRegister double_scratch) {
@@ -3400,51 +3382,46 @@ void MacroAssembler::ClampDoubleToUint8(Register result_reg,
Label in_bounds;
LoadDoubleLiteral(double_scratch, 0.0, result_reg);
- fcmpu(input_reg, double_scratch);
- bgt(&above_zero);
+ cdbr(input_reg, double_scratch);
+ bgt(&above_zero, Label::kNear);
// Double value is less than zero, NaN or Inf, return 0.
LoadIntLiteral(result_reg, 0);
- b(&done);
+ b(&done, Label::kNear);
// Double value is >= 255, return 255.
bind(&above_zero);
LoadDoubleLiteral(double_scratch, 255.0, result_reg);
- fcmpu(input_reg, double_scratch);
- ble(&in_bounds);
+ cdbr(input_reg, double_scratch);
+ ble(&in_bounds, Label::kNear);
LoadIntLiteral(result_reg, 255);
- b(&done);
+ b(&done, Label::kNear);
// In 0-255 range, round and truncate.
bind(&in_bounds);
// round to nearest (default rounding mode)
- fctiw(double_scratch, input_reg);
- MovDoubleLowToInt(result_reg, double_scratch);
+ cfdbr(ROUND_TO_NEAREST_WITH_TIES_TO_EVEN, result_reg, input_reg);
bind(&done);
}
-
void MacroAssembler::LoadInstanceDescriptors(Register map,
Register descriptors) {
LoadP(descriptors, FieldMemOperand(map, Map::kDescriptorsOffset));
}
-
void MacroAssembler::NumberOfOwnDescriptors(Register dst, Register map) {
- lwz(dst, FieldMemOperand(map, Map::kBitField3Offset));
+ LoadlW(dst, FieldMemOperand(map, Map::kBitField3Offset));
DecodeField<Map::NumberOfOwnDescriptorsBits>(dst);
}
-
void MacroAssembler::EnumLength(Register dst, Register map) {
STATIC_ASSERT(Map::EnumLengthBits::kShift == 0);
- lwz(dst, FieldMemOperand(map, Map::kBitField3Offset));
- ExtractBitMask(dst, dst, Map::EnumLengthBits::kMask);
+ LoadW(dst, FieldMemOperand(map, Map::kBitField3Offset));
+ And(dst, Operand(Map::EnumLengthBits::kMask));
SmiTag(dst);
}
-
void MacroAssembler::LoadAccessor(Register dst, Register holder,
int accessor_index,
AccessorComponent accessor) {
@@ -3458,858 +3435,1779 @@ void MacroAssembler::LoadAccessor(Register dst, Register holder,
LoadP(dst, FieldMemOperand(dst, offset));
}
-
void MacroAssembler::CheckEnumCache(Label* call_runtime) {
- Register null_value = r8;
- Register empty_fixed_array_value = r9;
+ Register null_value = r7;
+ Register empty_fixed_array_value = r8;
LoadRoot(empty_fixed_array_value, Heap::kEmptyFixedArrayRootIndex);
Label next, start;
- mr(r5, r3);
+ LoadRR(r4, r2);
// Check if the enum length field is properly initialized, indicating that
// there is an enum cache.
- LoadP(r4, FieldMemOperand(r5, HeapObject::kMapOffset));
+ LoadP(r3, FieldMemOperand(r4, HeapObject::kMapOffset));
- EnumLength(r6, r4);
- CmpSmiLiteral(r6, Smi::FromInt(kInvalidEnumCacheSentinel), r0);
+ EnumLength(r5, r3);
+ CmpSmiLiteral(r5, Smi::FromInt(kInvalidEnumCacheSentinel), r0);
beq(call_runtime);
LoadRoot(null_value, Heap::kNullValueRootIndex);
- b(&start);
+ b(&start, Label::kNear);
bind(&next);
- LoadP(r4, FieldMemOperand(r5, HeapObject::kMapOffset));
+ LoadP(r3, FieldMemOperand(r4, HeapObject::kMapOffset));
// For all objects but the receiver, check that the cache is empty.
- EnumLength(r6, r4);
- CmpSmiLiteral(r6, Smi::FromInt(0), r0);
+ EnumLength(r5, r3);
+ CmpSmiLiteral(r5, Smi::FromInt(0), r0);
bne(call_runtime);
bind(&start);
- // Check that there are no elements. Register r5 contains the current JS
+ // Check that there are no elements. Register r4 contains the current JS
// object we've reached through the prototype chain.
Label no_elements;
- LoadP(r5, FieldMemOperand(r5, JSObject::kElementsOffset));
- cmp(r5, empty_fixed_array_value);
- beq(&no_elements);
+ LoadP(r4, FieldMemOperand(r4, JSObject::kElementsOffset));
+ CmpP(r4, empty_fixed_array_value);
+ beq(&no_elements, Label::kNear);
// Second chance, the object may be using the empty slow element dictionary.
CompareRoot(r5, Heap::kEmptySlowElementDictionaryRootIndex);
bne(call_runtime);
bind(&no_elements);
- LoadP(r5, FieldMemOperand(r4, Map::kPrototypeOffset));
- cmp(r5, null_value);
+ LoadP(r4, FieldMemOperand(r3, Map::kPrototypeOffset));
+ CmpP(r4, null_value);
bne(&next);
}
-
////////////////////////////////////////////////////////////////////////////////
//
-// New MacroAssembler Interfaces added for PPC
+// New MacroAssembler Interfaces added for S390
//
////////////////////////////////////////////////////////////////////////////////
-void MacroAssembler::LoadIntLiteral(Register dst, int value) {
- mov(dst, Operand(value));
-}
-
-
-void MacroAssembler::LoadSmiLiteral(Register dst, Smi* smi) {
- mov(dst, Operand(smi));
-}
-
-
-void MacroAssembler::LoadDoubleLiteral(DoubleRegister result, double value,
- Register scratch) {
- if (FLAG_enable_embedded_constant_pool && is_constant_pool_available() &&
- !(scratch.is(r0) && ConstantPoolAccessIsInOverflow())) {
- ConstantPoolEntry::Access access = ConstantPoolAddEntry(value);
- if (access == ConstantPoolEntry::OVERFLOWED) {
- addis(scratch, kConstantPoolRegister, Operand::Zero());
- lfd(result, MemOperand(scratch, 0));
- } else {
- lfd(result, MemOperand(kConstantPoolRegister, 0));
- }
- return;
- }
-
- // avoid gcc strict aliasing error using union cast
- union {
- double dval;
-#if V8_TARGET_ARCH_PPC64
- intptr_t ival;
-#else
- intptr_t ival[2];
+// Primarily used for loading constants
+// This should really move to be in macro-assembler as it
+// is really a pseudo instruction
+// Some usages of this intend for a FIXED_SEQUENCE to be used
+// @TODO - break this dependency so we can optimize mov() in general
+// and only use the generic version when we require a fixed sequence
+void MacroAssembler::LoadRepresentation(Register dst, const MemOperand& mem,
+ Representation r, Register scratch) {
+ DCHECK(!r.IsDouble());
+ if (r.IsInteger8()) {
+ LoadB(dst, mem);
+ lgbr(dst, dst);
+ } else if (r.IsUInteger8()) {
+ LoadlB(dst, mem);
+ } else if (r.IsInteger16()) {
+ LoadHalfWordP(dst, mem, scratch);
+ lghr(dst, dst);
+ } else if (r.IsUInteger16()) {
+ LoadHalfWordP(dst, mem, scratch);
+#if V8_TARGET_ARCH_S390X
+ } else if (r.IsInteger32()) {
+ LoadW(dst, mem, scratch);
#endif
- } litVal;
-
- litVal.dval = value;
-
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mov(scratch, Operand(litVal.ival));
- mtfprd(result, scratch);
- return;
+ } else {
+ LoadP(dst, mem, scratch);
}
-#endif
-
- addi(sp, sp, Operand(-kDoubleSize));
-#if V8_TARGET_ARCH_PPC64
- mov(scratch, Operand(litVal.ival));
- std(scratch, MemOperand(sp));
-#else
- LoadIntLiteral(scratch, litVal.ival[0]);
- stw(scratch, MemOperand(sp, 0));
- LoadIntLiteral(scratch, litVal.ival[1]);
- stw(scratch, MemOperand(sp, 4));
-#endif
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(result, MemOperand(sp, 0));
- addi(sp, sp, Operand(kDoubleSize));
}
-
-void MacroAssembler::MovIntToDouble(DoubleRegister dst, Register src,
- Register scratch) {
-// sign-extend src to 64-bit
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mtfprwa(dst, src);
- return;
- }
+void MacroAssembler::StoreRepresentation(Register src, const MemOperand& mem,
+ Representation r, Register scratch) {
+ DCHECK(!r.IsDouble());
+ if (r.IsInteger8() || r.IsUInteger8()) {
+ StoreByte(src, mem, scratch);
+ } else if (r.IsInteger16() || r.IsUInteger16()) {
+ StoreHalfWord(src, mem, scratch);
+#if V8_TARGET_ARCH_S390X
+ } else if (r.IsInteger32()) {
+ StoreW(src, mem, scratch);
#endif
+ } else {
+ if (r.IsHeapObject()) {
+ AssertNotSmi(src);
+ } else if (r.IsSmi()) {
+ AssertSmi(src);
+ }
+ StoreP(src, mem, scratch);
+ }
+}
- DCHECK(!src.is(scratch));
- subi(sp, sp, Operand(kDoubleSize));
-#if V8_TARGET_ARCH_PPC64
- extsw(scratch, src);
- std(scratch, MemOperand(sp, 0));
-#else
- srawi(scratch, src, 31);
- stw(scratch, MemOperand(sp, Register::kExponentOffset));
- stw(src, MemOperand(sp, Register::kMantissaOffset));
-#endif
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(dst, MemOperand(sp, 0));
- addi(sp, sp, Operand(kDoubleSize));
+void MacroAssembler::TestJSArrayForAllocationMemento(Register receiver_reg,
+ Register scratch_reg,
+ Label* no_memento_found) {
+ ExternalReference new_space_start =
+ ExternalReference::new_space_start(isolate());
+ ExternalReference new_space_allocation_top =
+ ExternalReference::new_space_allocation_top_address(isolate());
+ AddP(scratch_reg, receiver_reg,
+ Operand(JSArray::kSize + AllocationMemento::kSize - kHeapObjectTag));
+ CmpP(scratch_reg, Operand(new_space_start));
+ blt(no_memento_found);
+ mov(ip, Operand(new_space_allocation_top));
+ LoadP(ip, MemOperand(ip));
+ CmpP(scratch_reg, ip);
+ bgt(no_memento_found);
+ LoadP(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
+ CmpP(scratch_reg, Operand(isolate()->factory()->allocation_memento_map()));
}
+Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3,
+ Register reg4, Register reg5,
+ Register reg6) {
+ RegList regs = 0;
+ if (reg1.is_valid()) regs |= reg1.bit();
+ if (reg2.is_valid()) regs |= reg2.bit();
+ if (reg3.is_valid()) regs |= reg3.bit();
+ if (reg4.is_valid()) regs |= reg4.bit();
+ if (reg5.is_valid()) regs |= reg5.bit();
+ if (reg6.is_valid()) regs |= reg6.bit();
-void MacroAssembler::MovUnsignedIntToDouble(DoubleRegister dst, Register src,
- Register scratch) {
-// zero-extend src to 64-bit
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mtfprwz(dst, src);
- return;
+ const RegisterConfiguration* config =
+ RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT);
+ for (int i = 0; i < config->num_allocatable_general_registers(); ++i) {
+ int code = config->GetAllocatableGeneralCode(i);
+ Register candidate = Register::from_code(code);
+ if (regs & candidate.bit()) continue;
+ return candidate;
}
-#endif
-
- DCHECK(!src.is(scratch));
- subi(sp, sp, Operand(kDoubleSize));
-#if V8_TARGET_ARCH_PPC64
- clrldi(scratch, src, Operand(32));
- std(scratch, MemOperand(sp, 0));
-#else
- li(scratch, Operand::Zero());
- stw(scratch, MemOperand(sp, Register::kExponentOffset));
- stw(src, MemOperand(sp, Register::kMantissaOffset));
-#endif
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(dst, MemOperand(sp, 0));
- addi(sp, sp, Operand(kDoubleSize));
+ UNREACHABLE();
+ return no_reg;
}
-
-void MacroAssembler::MovInt64ToDouble(DoubleRegister dst,
-#if !V8_TARGET_ARCH_PPC64
- Register src_hi,
-#endif
- Register src) {
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mtfprd(dst, src);
- return;
- }
+void MacroAssembler::JumpIfDictionaryInPrototypeChain(Register object,
+ Register scratch0,
+ Register scratch1,
+ Label* found) {
+ DCHECK(!scratch1.is(scratch0));
+ Register current = scratch0;
+ Label loop_again, end;
+
+ // scratch contained elements pointer.
+ LoadRR(current, object);
+ LoadP(current, FieldMemOperand(current, HeapObject::kMapOffset));
+ LoadP(current, FieldMemOperand(current, Map::kPrototypeOffset));
+ CompareRoot(current, Heap::kNullValueRootIndex);
+ beq(&end);
+
+ // Loop based on the map going up the prototype chain.
+ bind(&loop_again);
+ LoadP(current, FieldMemOperand(current, HeapObject::kMapOffset));
+
+ STATIC_ASSERT(JS_PROXY_TYPE < JS_OBJECT_TYPE);
+ STATIC_ASSERT(JS_VALUE_TYPE < JS_OBJECT_TYPE);
+ LoadlB(scratch1, FieldMemOperand(current, Map::kInstanceTypeOffset));
+ CmpP(scratch1, Operand(JS_OBJECT_TYPE));
+ blt(found);
+
+ LoadlB(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
+ DecodeField<Map::ElementsKindBits>(scratch1);
+ CmpP(scratch1, Operand(DICTIONARY_ELEMENTS));
+ beq(found);
+ LoadP(current, FieldMemOperand(current, Map::kPrototypeOffset));
+ CompareRoot(current, Heap::kNullValueRootIndex);
+ bne(&loop_again);
+
+ bind(&end);
+}
+
+void MacroAssembler::mov(Register dst, const Operand& src) {
+ if (src.rmode_ != kRelocInfo_NONEPTR) {
+ // some form of relocation needed
+ RecordRelocInfo(src.rmode_, src.imm_);
+ }
+
+#if V8_TARGET_ARCH_S390X
+ int64_t value = src.immediate();
+ int32_t hi_32 = static_cast<int64_t>(value) >> 32;
+ int32_t lo_32 = static_cast<int32_t>(value);
+
+ iihf(dst, Operand(hi_32));
+ iilf(dst, Operand(lo_32));
+#else
+ int value = src.immediate();
+ iilf(dst, Operand(value));
+#endif
+}
+
+void MacroAssembler::Mul(Register dst, Register src1, Register src2) {
+ if (dst.is(src2)) {
+ MulP(dst, src1);
+ } else if (dst.is(src1)) {
+ MulP(dst, src2);
+ } else {
+ Move(dst, src1);
+ MulP(dst, src2);
+ }
+}
+
+void MacroAssembler::DivP(Register dividend, Register divider) {
+ // have to make sure the src and dst are reg pairs
+ DCHECK(dividend.code() % 2 == 0);
+#if V8_TARGET_ARCH_S390X
+ dsgr(dividend, divider);
+#else
+ dr(dividend, divider);
#endif
+}
- subi(sp, sp, Operand(kDoubleSize));
-#if V8_TARGET_ARCH_PPC64
- std(src, MemOperand(sp, 0));
+void MacroAssembler::MulP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ msgfi(dst, opnd);
#else
- stw(src_hi, MemOperand(sp, Register::kExponentOffset));
- stw(src, MemOperand(sp, Register::kMantissaOffset));
+ msfi(dst, opnd);
#endif
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(dst, MemOperand(sp, 0));
- addi(sp, sp, Operand(kDoubleSize));
}
+void MacroAssembler::MulP(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ msgr(dst, src);
+#else
+ msr(dst, src);
+#endif
+}
-#if V8_TARGET_ARCH_PPC64
-void MacroAssembler::MovInt64ComponentsToDouble(DoubleRegister dst,
- Register src_hi,
- Register src_lo,
- Register scratch) {
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- sldi(scratch, src_hi, Operand(32));
- rldimi(scratch, src_lo, 0, 32);
- mtfprd(dst, scratch);
- return;
+void MacroAssembler::MulP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ if (is_uint16(opnd.offset())) {
+ ms(dst, opnd);
+ } else if (is_int20(opnd.offset())) {
+ msy(dst, opnd);
+ } else {
+ UNIMPLEMENTED();
}
+#else
+ if (is_int20(opnd.offset())) {
+ msg(dst, opnd);
+ } else {
+ UNIMPLEMENTED();
+ }
+#endif
+}
+
+//----------------------------------------------------------------------------
+// Add Instructions
+//----------------------------------------------------------------------------
- subi(sp, sp, Operand(kDoubleSize));
- stw(src_hi, MemOperand(sp, Register::kExponentOffset));
- stw(src_lo, MemOperand(sp, Register::kMantissaOffset));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(dst, MemOperand(sp));
- addi(sp, sp, Operand(kDoubleSize));
+// Add 32-bit (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::Add32(Register dst, const Operand& opnd) {
+ if (is_int16(opnd.immediate()))
+ ahi(dst, opnd);
+ else
+ afi(dst, opnd);
}
+
+// Add Pointer Size (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::AddP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ if (is_int16(opnd.immediate()))
+ aghi(dst, opnd);
+ else
+ agfi(dst, opnd);
+#else
+ Add32(dst, opnd);
#endif
+}
+// Add 32-bit (Register dst = Register src + Immediate opnd)
+void MacroAssembler::Add32(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) {
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) {
+ ahik(dst, src, opnd);
+ return;
+ }
+ lr(dst, src);
+ }
+ Add32(dst, opnd);
+}
-void MacroAssembler::InsertDoubleLow(DoubleRegister dst, Register src,
- Register scratch) {
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mffprd(scratch, dst);
- rldimi(scratch, src, 0, 32);
- mtfprd(dst, scratch);
- return;
+// Add Pointer Size (Register dst = Register src + Immediate opnd)
+void MacroAssembler::AddP(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) {
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && is_int16(opnd.immediate())) {
+ AddPImm_RRI(dst, src, opnd);
+ return;
+ }
+ LoadRR(dst, src);
}
-#endif
+ AddP(dst, opnd);
+}
- subi(sp, sp, Operand(kDoubleSize));
- stfd(dst, MemOperand(sp));
- stw(src, MemOperand(sp, Register::kMantissaOffset));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(dst, MemOperand(sp));
- addi(sp, sp, Operand(kDoubleSize));
+// Add 32-bit (Register dst = Register dst + Register src)
+void MacroAssembler::Add32(Register dst, Register src) { ar(dst, src); }
+
+// Add Pointer Size (Register dst = Register dst + Register src)
+void MacroAssembler::AddP(Register dst, Register src) { AddRR(dst, src); }
+
+// Add Pointer Size with src extension
+// (Register dst(ptr) = Register dst (ptr) + Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::AddP_ExtendSrc(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ agfr(dst, src);
+#else
+ ar(dst, src);
+#endif
}
+// Add 32-bit (Register dst = Register src1 + Register src2)
+void MacroAssembler::Add32(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate AR/AGR, over the non clobbering ARK/AGRK
+ // as AR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ ark(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ ar(dst, src2);
+}
-void MacroAssembler::InsertDoubleHigh(DoubleRegister dst, Register src,
- Register scratch) {
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mffprd(scratch, dst);
- rldimi(scratch, src, 32, 0);
- mtfprd(dst, scratch);
- return;
+// Add Pointer Size (Register dst = Register src1 + Register src2)
+void MacroAssembler::AddP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate AR/AGR, over the non clobbering ARK/AGRK
+ // as AR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ AddP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ AddRR(dst, src2);
+}
+
+// Add Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) + Register src1 (ptr) +
+// Register src2 (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::AddP_ExtendSrc(Register dst, Register src1,
+ Register src2) {
+#if V8_TARGET_ARCH_S390X
+ if (dst.is(src2)) {
+ // The source we need to sign extend is the same as result.
+ lgfr(dst, src2);
+ agr(dst, src1);
+ } else {
+ if (!dst.is(src1)) LoadRR(dst, src1);
+ agfr(dst, src2);
}
+#else
+ AddP(dst, src1, src2);
+#endif
+}
+
+// Add 32-bit (Register-Memory)
+void MacroAssembler::Add32(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ a(dst, opnd);
+ else
+ ay(dst, opnd);
+}
+
+// Add Pointer Size (Register-Memory)
+void MacroAssembler::AddP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ ag(dst, opnd);
+#else
+ Add32(dst, opnd);
+#endif
+}
+
+// Add Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) + Mem opnd (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::AddP_ExtendSrc(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ agf(dst, opnd);
+#else
+ Add32(dst, opnd);
#endif
+}
- subi(sp, sp, Operand(kDoubleSize));
- stfd(dst, MemOperand(sp));
- stw(src, MemOperand(sp, Register::kExponentOffset));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfd(dst, MemOperand(sp));
- addi(sp, sp, Operand(kDoubleSize));
+// Add 32-bit (Memory - Immediate)
+void MacroAssembler::Add32(const MemOperand& opnd, const Operand& imm) {
+ DCHECK(is_int8(imm.immediate()));
+ DCHECK(is_int20(opnd.offset()));
+ DCHECK(CpuFeatures::IsSupported(GENERAL_INSTR_EXT));
+ asi(opnd, imm);
}
+// Add Pointer-sized (Memory - Immediate)
+void MacroAssembler::AddP(const MemOperand& opnd, const Operand& imm) {
+ DCHECK(is_int8(imm.immediate()));
+ DCHECK(is_int20(opnd.offset()));
+ DCHECK(CpuFeatures::IsSupported(GENERAL_INSTR_EXT));
+#if V8_TARGET_ARCH_S390X
+ agsi(opnd, imm);
+#else
+ asi(opnd, imm);
+#endif
+}
+
+//----------------------------------------------------------------------------
+// Add Logical Instructions
+//----------------------------------------------------------------------------
+
+// Add Logical 32-bit (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::AddLogical(Register dst, const Operand& imm) {
+ alfi(dst, imm);
+}
-void MacroAssembler::MovDoubleLowToInt(Register dst, DoubleRegister src) {
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mffprwz(dst, src);
+// Add Logical Pointer Size (Register dst = Register dst + Immediate opnd)
+void MacroAssembler::AddLogicalP(Register dst, const Operand& imm) {
+#ifdef V8_TARGET_ARCH_S390X
+ algfi(dst, imm);
+#else
+ AddLogical(dst, imm);
+#endif
+}
+
+// Add Logical 32-bit (Register-Memory)
+void MacroAssembler::AddLogical(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ al_z(dst, opnd);
+ else
+ aly(dst, opnd);
+}
+
+// Add Logical Pointer Size (Register-Memory)
+void MacroAssembler::AddLogicalP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ alg(dst, opnd);
+#else
+ AddLogical(dst, opnd);
+#endif
+}
+
+//----------------------------------------------------------------------------
+// Subtract Instructions
+//----------------------------------------------------------------------------
+
+// Subtract 32-bit (Register dst = Register dst - Immediate opnd)
+void MacroAssembler::Sub32(Register dst, const Operand& imm) {
+ Add32(dst, Operand(-(imm.imm_)));
+}
+
+// Subtract Pointer Size (Register dst = Register dst - Immediate opnd)
+void MacroAssembler::SubP(Register dst, const Operand& imm) {
+ AddP(dst, Operand(-(imm.imm_)));
+}
+
+// Subtract 32-bit (Register dst = Register src - Immediate opnd)
+void MacroAssembler::Sub32(Register dst, Register src, const Operand& imm) {
+ Add32(dst, src, Operand(-(imm.imm_)));
+}
+
+// Subtract Pointer Sized (Register dst = Register src - Immediate opnd)
+void MacroAssembler::SubP(Register dst, Register src, const Operand& imm) {
+ AddP(dst, src, Operand(-(imm.imm_)));
+}
+
+// Subtract 32-bit (Register dst = Register dst - Register src)
+void MacroAssembler::Sub32(Register dst, Register src) { sr(dst, src); }
+
+// Subtract Pointer Size (Register dst = Register dst - Register src)
+void MacroAssembler::SubP(Register dst, Register src) { SubRR(dst, src); }
+
+// Subtract Pointer Size with src extension
+// (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubP_ExtendSrc(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ sgfr(dst, src);
+#else
+ sr(dst, src);
+#endif
+}
+
+// Subtract 32-bit (Register = Register - Register)
+void MacroAssembler::Sub32(Register dst, Register src1, Register src2) {
+ // Use non-clobbering version if possible
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && !dst.is(src1)) {
+ srk(dst, src1, src2);
+ return;
+ }
+ if (!dst.is(src1) && !dst.is(src2)) lr(dst, src1);
+ // In scenario where we have dst = src - dst, we need to swap and negate
+ if (!dst.is(src1) && dst.is(src2)) {
+ sr(dst, src1); // dst = (dst - src)
+ lcr(dst, dst); // dst = -dst
+ } else {
+ sr(dst, src2);
+ }
+}
+
+// Subtract Pointer Sized (Register = Register - Register)
+void MacroAssembler::SubP(Register dst, Register src1, Register src2) {
+ // Use non-clobbering version if possible
+ if (CpuFeatures::IsSupported(DISTINCT_OPS) && !dst.is(src1)) {
+ SubP_RRR(dst, src1, src2);
return;
}
+ if (!dst.is(src1) && !dst.is(src2)) LoadRR(dst, src1);
+ // In scenario where we have dst = src - dst, we need to swap and negate
+ if (!dst.is(src1) && dst.is(src2)) {
+ SubP(dst, src1); // dst = (dst - src)
+ LoadComplementRR(dst, dst); // dst = -dst
+ } else {
+ SubP(dst, src2);
+ }
+}
+
+// Subtract Pointer Size with src extension
+// (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubP_ExtendSrc(Register dst, Register src1,
+ Register src2) {
+#if V8_TARGET_ARCH_S390X
+ if (!dst.is(src1) && !dst.is(src2)) LoadRR(dst, src1);
+
+ // In scenario where we have dst = src - dst, we need to swap and negate
+ if (!dst.is(src1) && dst.is(src2)) {
+ lgfr(dst, dst); // Sign extend this operand first.
+ SubP(dst, src1); // dst = (dst - src)
+ LoadComplementRR(dst, dst); // dst = -dst
+ } else {
+ sgfr(dst, src2);
+ }
+#else
+ SubP(dst, src1, src2);
#endif
+}
+
+// Subtract 32-bit (Register-Memory)
+void MacroAssembler::Sub32(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ s(dst, opnd);
+ else
+ sy(dst, opnd);
+}
- subi(sp, sp, Operand(kDoubleSize));
- stfd(src, MemOperand(sp));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lwz(dst, MemOperand(sp, Register::kMantissaOffset));
- addi(sp, sp, Operand(kDoubleSize));
+// Subtract Pointer Sized (Register - Memory)
+void MacroAssembler::SubP(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ sg(dst, opnd);
+#else
+ Sub32(dst, opnd);
+#endif
}
+void MacroAssembler::MovIntToFloat(DoubleRegister dst, Register src) {
+ sllg(src, src, Operand(32));
+ ldgr(dst, src);
+}
-void MacroAssembler::MovDoubleHighToInt(Register dst, DoubleRegister src) {
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mffprd(dst, src);
- srdi(dst, dst, Operand(32));
- return;
+void MacroAssembler::MovFloatToInt(Register dst, DoubleRegister src) {
+ lgdr(dst, src);
+ srlg(dst, dst, Operand(32));
+}
+
+void MacroAssembler::SubP_ExtendSrc(Register dst, const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ sgf(dst, opnd);
+#else
+ Sub32(dst, opnd);
+#endif
+}
+
+//----------------------------------------------------------------------------
+// Subtract Logical Instructions
+//----------------------------------------------------------------------------
+
+// Subtract Logical 32-bit (Register - Memory)
+void MacroAssembler::SubLogical(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ sl(dst, opnd);
+ else
+ sly(dst, opnd);
+}
+
+// Subtract Logical Pointer Sized (Register - Memory)
+void MacroAssembler::SubLogicalP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ slgf(dst, opnd);
+#else
+ SubLogical(dst, opnd);
+#endif
+}
+
+// Subtract Logical Pointer Size with src extension
+// (Register dst (ptr) = Register dst (ptr) - Mem opnd (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::SubLogicalP_ExtendSrc(Register dst,
+ const MemOperand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(opnd.offset()));
+ slgf(dst, opnd);
+#else
+ SubLogical(dst, opnd);
+#endif
+}
+
+//----------------------------------------------------------------------------
+// Bitwise Operations
+//----------------------------------------------------------------------------
+
+// AND 32-bit - dst = dst & src
+void MacroAssembler::And(Register dst, Register src) { nr(dst, src); }
+
+// AND Pointer Size - dst = dst & src
+void MacroAssembler::AndP(Register dst, Register src) { AndRR(dst, src); }
+
+// Non-clobbering AND 32-bit - dst = src1 & src1
+void MacroAssembler::And(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ nrk(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ And(dst, src2);
+}
+
+// Non-clobbering AND pointer size - dst = src1 & src1
+void MacroAssembler::AndP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ AndP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ AndP(dst, src2);
+}
+
+// AND 32-bit (Reg - Mem)
+void MacroAssembler::And(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ n(dst, opnd);
+ else
+ ny(dst, opnd);
+}
+
+// AND Pointer Size (Reg - Mem)
+void MacroAssembler::AndP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ ng(dst, opnd);
+#else
+ And(dst, opnd);
+#endif
+}
+
+// AND 32-bit - dst = dst & imm
+void MacroAssembler::And(Register dst, const Operand& opnd) { nilf(dst, opnd); }
+
+// AND Pointer Size - dst = dst & imm
+void MacroAssembler::AndP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ intptr_t value = opnd.imm_;
+ if (value >> 32 != -1) {
+ // this may not work b/c condition code won't be set correctly
+ nihf(dst, Operand(value >> 32));
}
+ nilf(dst, Operand(value & 0xFFFFFFFF));
+#else
+ And(dst, opnd);
#endif
+}
+
+// AND 32-bit - dst = src & imm
+void MacroAssembler::And(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) lr(dst, src);
+ nilf(dst, opnd);
+}
+
+// AND Pointer Size - dst = src & imm
+void MacroAssembler::AndP(Register dst, Register src, const Operand& opnd) {
+ // Try to exploit RISBG first
+ intptr_t value = opnd.imm_;
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ intptr_t shifted_value = value;
+ int trailing_zeros = 0;
+
+ // We start checking how many trailing zeros are left at the end.
+ while ((0 != shifted_value) && (0 == (shifted_value & 1))) {
+ trailing_zeros++;
+ shifted_value >>= 1;
+ }
+
+ // If temp (value with right-most set of zeros shifted out) is 1 less
+ // than power of 2, we have consecutive bits of 1.
+ // Special case: If shift_value is zero, we cannot use RISBG, as it requires
+ // selection of at least 1 bit.
+ if ((0 != shifted_value) && base::bits::IsPowerOfTwo64(shifted_value + 1)) {
+ int startBit =
+ base::bits::CountLeadingZeros64(shifted_value) - trailing_zeros;
+ int endBit = 63 - trailing_zeros;
+ // Start: startBit, End: endBit, Shift = 0, true = zero unselected bits.
+ risbg(dst, src, Operand(startBit), Operand(endBit), Operand::Zero(),
+ true);
+ return;
+ } else if (-1 == shifted_value) {
+ // A Special case in which all top bits up to MSB are 1's. In this case,
+ // we can set startBit to be 0.
+ int endBit = 63 - trailing_zeros;
+ risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
+ return;
+ }
+ }
+
+ // If we are &'ing zero, we can just whack the dst register and skip copy
+ if (!dst.is(src) && (0 != value)) LoadRR(dst, src);
+ AndP(dst, opnd);
+}
+
+// OR 32-bit - dst = dst & src
+void MacroAssembler::Or(Register dst, Register src) { or_z(dst, src); }
- subi(sp, sp, Operand(kDoubleSize));
- stfd(src, MemOperand(sp));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lwz(dst, MemOperand(sp, Register::kExponentOffset));
- addi(sp, sp, Operand(kDoubleSize));
+// OR Pointer Size - dst = dst & src
+void MacroAssembler::OrP(Register dst, Register src) { OrRR(dst, src); }
+
+// Non-clobbering OR 32-bit - dst = src1 & src1
+void MacroAssembler::Or(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ ork(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ Or(dst, src2);
}
+// Non-clobbering OR pointer size - dst = src1 & src1
+void MacroAssembler::OrP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ OrP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ OrP(dst, src2);
+}
-void MacroAssembler::MovDoubleToInt64(
-#if !V8_TARGET_ARCH_PPC64
- Register dst_hi,
+// OR 32-bit (Reg - Mem)
+void MacroAssembler::Or(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ o(dst, opnd);
+ else
+ oy(dst, opnd);
+}
+
+// OR Pointer Size (Reg - Mem)
+void MacroAssembler::OrP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ og(dst, opnd);
+#else
+ Or(dst, opnd);
#endif
- Register dst, DoubleRegister src) {
-#if V8_TARGET_ARCH_PPC64
- if (CpuFeatures::IsSupported(FPR_GPR_MOV)) {
- mffprd(dst, src);
- return;
+}
+
+// OR 32-bit - dst = dst & imm
+void MacroAssembler::Or(Register dst, const Operand& opnd) { oilf(dst, opnd); }
+
+// OR Pointer Size - dst = dst & imm
+void MacroAssembler::OrP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ intptr_t value = opnd.imm_;
+ if (value >> 32 != 0) {
+ // this may not work b/c condition code won't be set correctly
+ oihf(dst, Operand(value >> 32));
}
+ oilf(dst, Operand(value & 0xFFFFFFFF));
+#else
+ Or(dst, opnd);
#endif
+}
+
+// OR 32-bit - dst = src & imm
+void MacroAssembler::Or(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) lr(dst, src);
+ oilf(dst, opnd);
+}
+
+// OR Pointer Size - dst = src & imm
+void MacroAssembler::OrP(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) LoadRR(dst, src);
+ OrP(dst, opnd);
+}
+
+// XOR 32-bit - dst = dst & src
+void MacroAssembler::Xor(Register dst, Register src) { xr(dst, src); }
+
+// XOR Pointer Size - dst = dst & src
+void MacroAssembler::XorP(Register dst, Register src) { XorRR(dst, src); }
- subi(sp, sp, Operand(kDoubleSize));
- stfd(src, MemOperand(sp));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
-#if V8_TARGET_ARCH_PPC64
- ld(dst, MemOperand(sp, 0));
+// Non-clobbering XOR 32-bit - dst = src1 & src1
+void MacroAssembler::Xor(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ xrk(dst, src1, src2);
+ return;
+ } else {
+ lr(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ Xor(dst, src2);
+}
+
+// Non-clobbering XOR pointer size - dst = src1 & src1
+void MacroAssembler::XorP(Register dst, Register src1, Register src2) {
+ if (!dst.is(src1) && !dst.is(src2)) {
+ // We prefer to generate XR/XGR, over the non clobbering XRK/XRK
+ // as XR is a smaller instruction
+ if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ XorP_RRR(dst, src1, src2);
+ return;
+ } else {
+ LoadRR(dst, src1);
+ }
+ } else if (dst.is(src2)) {
+ src2 = src1;
+ }
+ XorP(dst, src2);
+}
+
+// XOR 32-bit (Reg - Mem)
+void MacroAssembler::Xor(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ x(dst, opnd);
+ else
+ xy(dst, opnd);
+}
+
+// XOR Pointer Size (Reg - Mem)
+void MacroAssembler::XorP(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ xg(dst, opnd);
#else
- lwz(dst_hi, MemOperand(sp, Register::kExponentOffset));
- lwz(dst, MemOperand(sp, Register::kMantissaOffset));
+ Xor(dst, opnd);
#endif
- addi(sp, sp, Operand(kDoubleSize));
}
+// XOR 32-bit - dst = dst & imm
+void MacroAssembler::Xor(Register dst, const Operand& opnd) { xilf(dst, opnd); }
-void MacroAssembler::MovIntToFloat(DoubleRegister dst, Register src) {
- subi(sp, sp, Operand(kFloatSize));
- stw(src, MemOperand(sp, 0));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lfs(dst, MemOperand(sp, 0));
- addi(sp, sp, Operand(kFloatSize));
+// XOR Pointer Size - dst = dst & imm
+void MacroAssembler::XorP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ intptr_t value = opnd.imm_;
+ xihf(dst, Operand(value >> 32));
+ xilf(dst, Operand(value & 0xFFFFFFFF));
+#else
+ Xor(dst, opnd);
+#endif
}
+// XOR 32-bit - dst = src & imm
+void MacroAssembler::Xor(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) lr(dst, src);
+ xilf(dst, opnd);
+}
-void MacroAssembler::MovFloatToInt(Register dst, DoubleRegister src) {
- subi(sp, sp, Operand(kFloatSize));
- frsp(src, src);
- stfs(src, MemOperand(sp, 0));
- nop(GROUP_ENDING_NOP); // LHS/RAW optimization
- lwz(dst, MemOperand(sp, 0));
- addi(sp, sp, Operand(kFloatSize));
+// XOR Pointer Size - dst = src & imm
+void MacroAssembler::XorP(Register dst, Register src, const Operand& opnd) {
+ if (!dst.is(src)) LoadRR(dst, src);
+ XorP(dst, opnd);
}
+void MacroAssembler::NotP(Register dst) {
+#if V8_TARGET_ARCH_S390X
+ xihf(dst, Operand(0xFFFFFFFF));
+ xilf(dst, Operand(0xFFFFFFFF));
+#else
+ XorP(dst, Operand(0xFFFFFFFF));
+#endif
+}
-void MacroAssembler::Add(Register dst, Register src, intptr_t value,
- Register scratch) {
+// works the same as mov
+void MacroAssembler::Load(Register dst, const Operand& opnd) {
+ intptr_t value = opnd.immediate();
if (is_int16(value)) {
- addi(dst, src, Operand(value));
+#if V8_TARGET_ARCH_S390X
+ lghi(dst, opnd);
+#else
+ lhi(dst, opnd);
+#endif
} else {
- mov(scratch, Operand(value));
- add(dst, src, scratch);
+#if V8_TARGET_ARCH_S390X
+ llilf(dst, opnd);
+#else
+ iilf(dst, opnd);
+#endif
}
}
+void MacroAssembler::Load(Register dst, const MemOperand& opnd) {
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ lgf(dst, opnd); // 64<-32
+#else
+ if (is_uint12(opnd.offset())) {
+ l(dst, opnd);
+ } else {
+ ly(dst, opnd);
+ }
+#endif
+}
-void MacroAssembler::Cmpi(Register src1, const Operand& src2, Register scratch,
- CRegister cr) {
- intptr_t value = src2.immediate();
- if (is_int16(value)) {
- cmpi(src1, src2, cr);
+//-----------------------------------------------------------------------------
+// Compare Helpers
+//-----------------------------------------------------------------------------
+
+// Compare 32-bit Register vs Register
+void MacroAssembler::Cmp32(Register src1, Register src2) { cr_z(src1, src2); }
+
+// Compare Pointer Sized Register vs Register
+void MacroAssembler::CmpP(Register src1, Register src2) {
+#if V8_TARGET_ARCH_S390X
+ cgr(src1, src2);
+#else
+ Cmp32(src1, src2);
+#endif
+}
+
+// Compare 32-bit Register vs Immediate
+// This helper will set up proper relocation entries if required.
+void MacroAssembler::Cmp32(Register dst, const Operand& opnd) {
+ if (opnd.rmode_ == kRelocInfo_NONEPTR) {
+ intptr_t value = opnd.immediate();
+ if (is_int16(value))
+ chi(dst, opnd);
+ else
+ cfi(dst, opnd);
+ } else {
+ // Need to generate relocation record here
+ RecordRelocInfo(opnd.rmode_, opnd.imm_);
+ cfi(dst, opnd);
+ }
+}
+
+// Compare Pointer Sized Register vs Immediate
+// This helper will set up proper relocation entries if required.
+void MacroAssembler::CmpP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ if (opnd.rmode_ == kRelocInfo_NONEPTR) {
+ cgfi(dst, opnd);
} else {
- mov(scratch, src2);
- cmp(src1, scratch, cr);
+ mov(r0, opnd); // Need to generate 64-bit relocation
+ cgr(dst, r0);
}
+#else
+ Cmp32(dst, opnd);
+#endif
+}
+
+// Compare 32-bit Register vs Memory
+void MacroAssembler::Cmp32(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ c(dst, opnd);
+ else
+ cy(dst, opnd);
+}
+
+// Compare Pointer Size Register vs Memory
+void MacroAssembler::CmpP(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ cg(dst, opnd);
+#else
+ Cmp32(dst, opnd);
+#endif
+}
+
+//-----------------------------------------------------------------------------
+// Compare Logical Helpers
+//-----------------------------------------------------------------------------
+
+// Compare Logical 32-bit Register vs Register
+void MacroAssembler::CmpLogical32(Register dst, Register src) { clr(dst, src); }
+
+// Compare Logical Pointer Sized Register vs Register
+void MacroAssembler::CmpLogicalP(Register dst, Register src) {
+#ifdef V8_TARGET_ARCH_S390X
+ clgr(dst, src);
+#else
+ CmpLogical32(dst, src);
+#endif
+}
+
+// Compare Logical 32-bit Register vs Immediate
+void MacroAssembler::CmpLogical32(Register dst, const Operand& opnd) {
+ clfi(dst, opnd);
+}
+
+// Compare Logical Pointer Sized Register vs Immediate
+void MacroAssembler::CmpLogicalP(Register dst, const Operand& opnd) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(static_cast<uint32_t>(opnd.immediate() >> 32) == 0);
+ clgfi(dst, opnd);
+#else
+ CmpLogical32(dst, opnd);
+#endif
+}
+
+// Compare Logical 32-bit Register vs Memory
+void MacroAssembler::CmpLogical32(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+ if (is_uint12(opnd.offset()))
+ cl(dst, opnd);
+ else
+ cly(dst, opnd);
+}
+
+// Compare Logical Pointer Sized Register vs Memory
+void MacroAssembler::CmpLogicalP(Register dst, const MemOperand& opnd) {
+ // make sure offset is within 20 bit range
+ DCHECK(is_int20(opnd.offset()));
+#if V8_TARGET_ARCH_S390X
+ clg(dst, opnd);
+#else
+ CmpLogical32(dst, opnd);
+#endif
+}
+
+// Compare Logical Byte (Mem - Imm)
+void MacroAssembler::CmpLogicalByte(const MemOperand& mem, const Operand& imm) {
+ DCHECK(is_uint8(imm.immediate()));
+ if (is_uint12(mem.offset()))
+ cli(mem, imm);
+ else
+ cliy(mem, imm);
+}
+
+void MacroAssembler::Branch(Condition c, const Operand& opnd) {
+ intptr_t value = opnd.immediate();
+ if (is_int16(value))
+ brc(c, opnd);
+ else
+ brcl(c, opnd);
+}
+
+// Branch On Count. Decrement R1, and branch if R1 != 0.
+void MacroAssembler::BranchOnCount(Register r1, Label* l) {
+ int32_t offset = branch_offset(l);
+ positions_recorder()->WriteRecordedPositions();
+ if (is_int16(offset)) {
+#if V8_TARGET_ARCH_S390X
+ brctg(r1, Operand(offset));
+#else
+ brct(r1, Operand(offset));
+#endif
+ } else {
+ AddP(r1, Operand(-1));
+ Branch(ne, Operand(offset));
+ }
+}
+
+void MacroAssembler::LoadIntLiteral(Register dst, int value) {
+ Load(dst, Operand(value));
+}
+
+void MacroAssembler::LoadSmiLiteral(Register dst, Smi* smi) {
+ intptr_t value = reinterpret_cast<intptr_t>(smi);
+#if V8_TARGET_ARCH_S390X
+ DCHECK((value & 0xffffffff) == 0);
+ // The smi value is loaded in upper 32-bits. Lower 32-bit are zeros.
+ llihf(dst, Operand(value >> 32));
+#else
+ llilf(dst, Operand(value));
+#endif
+}
+
+void MacroAssembler::LoadDoubleLiteral(DoubleRegister result, uint64_t value,
+ Register scratch) {
+ uint32_t hi_32 = value >> 32;
+ uint32_t lo_32 = static_cast<uint32_t>(value);
+
+ // Load the 64-bit value into a GPR, then transfer it to FPR via LDGR
+ iihf(scratch, Operand(hi_32));
+ iilf(scratch, Operand(lo_32));
+ ldgr(result, scratch);
+}
+
+void MacroAssembler::LoadDoubleLiteral(DoubleRegister result, double value,
+ Register scratch) {
+ uint64_t int_val = bit_cast<uint64_t, double>(value);
+ LoadDoubleLiteral(result, int_val, scratch);
+}
+
+void MacroAssembler::LoadFloat32Literal(DoubleRegister result, float value,
+ Register scratch) {
+ uint32_t hi_32 = bit_cast<uint32_t>(value);
+ uint32_t lo_32 = 0;
+
+ // Load the 64-bit value into a GPR, then transfer it to FPR via LDGR
+ iihf(scratch, Operand(hi_32));
+ iilf(scratch, Operand(lo_32));
+ ldgr(result, scratch);
+}
+
+void MacroAssembler::CmpSmiLiteral(Register src1, Smi* smi, Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ cgr(src1, scratch);
+#else
+ // CFI takes 32-bit immediate.
+ cfi(src1, Operand(smi));
+#endif
+}
+
+void MacroAssembler::CmpLogicalSmiLiteral(Register src1, Smi* smi,
+ Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ clgr(src1, scratch);
+#else
+ // CLFI takes 32-bit immediate
+ clfi(src1, Operand(smi));
+#endif
+}
+
+void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi* smi,
+ Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ AddP(dst, src, scratch);
+#else
+ AddP(dst, src, Operand(reinterpret_cast<intptr_t>(smi)));
+#endif
+}
+
+void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi* smi,
+ Register scratch) {
+#if V8_TARGET_ARCH_S390X
+ LoadSmiLiteral(scratch, smi);
+ SubP(dst, src, scratch);
+#else
+ AddP(dst, src, Operand(-(reinterpret_cast<intptr_t>(smi))));
+#endif
+}
+
+void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi* smi) {
+ if (!dst.is(src)) LoadRR(dst, src);
+#if V8_TARGET_ARCH_S390X
+ DCHECK((reinterpret_cast<intptr_t>(smi) & 0xffffffff) == 0);
+ int value = static_cast<int>(reinterpret_cast<intptr_t>(smi) >> 32);
+ nihf(dst, Operand(value));
+#else
+ nilf(dst, Operand(reinterpret_cast<int>(smi)));
+#endif
+}
+
+// Load a "pointer" sized value from the memory location
+void MacroAssembler::LoadP(Register dst, const MemOperand& mem,
+ Register scratch) {
+ int offset = mem.offset();
+
+ if (!scratch.is(no_reg) && !is_int20(offset)) {
+ /* cannot use d-form */
+ LoadIntLiteral(scratch, offset);
+#if V8_TARGET_ARCH_S390X
+ lg(dst, MemOperand(mem.rb(), scratch));
+#else
+ l(dst, MemOperand(mem.rb(), scratch));
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ lg(dst, mem);
+#else
+ if (is_uint12(offset)) {
+ l(dst, mem);
+ } else {
+ ly(dst, mem);
+ }
+#endif
+ }
+}
+
+// Store a "pointer" sized value to the memory location
+void MacroAssembler::StoreP(Register src, const MemOperand& mem,
+ Register scratch) {
+ if (!is_int20(mem.offset())) {
+ DCHECK(!scratch.is(no_reg));
+ DCHECK(!scratch.is(r0));
+ LoadIntLiteral(scratch, mem.offset());
+#if V8_TARGET_ARCH_S390X
+ stg(src, MemOperand(mem.rb(), scratch));
+#else
+ st(src, MemOperand(mem.rb(), scratch));
+#endif
+ } else {
+#if V8_TARGET_ARCH_S390X
+ stg(src, mem);
+#else
+ // StoreW will try to generate ST if offset fits, otherwise
+ // it'll generate STY.
+ StoreW(src, mem);
+#endif
+ }
+}
+
+// Store a "pointer" sized constant to the memory location
+void MacroAssembler::StoreP(const MemOperand& mem, const Operand& opnd,
+ Register scratch) {
+ // Relocations not supported
+ DCHECK(opnd.rmode_ == kRelocInfo_NONEPTR);
+
+ // Try to use MVGHI/MVHI
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT) && is_uint12(mem.offset()) &&
+ mem.getIndexRegister().is(r0) && is_int16(opnd.imm_)) {
+#if V8_TARGET_ARCH_S390X
+ mvghi(mem, opnd);
+#else
+ mvhi(mem, opnd);
+#endif
+ } else {
+ LoadImmP(scratch, opnd);
+ StoreP(scratch, mem);
+ }
+}
+
+void MacroAssembler::LoadMultipleP(Register dst1, Register dst2,
+ const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(mem.offset()));
+ lmg(dst1, dst2, mem);
+#else
+ if (is_uint12(mem.offset())) {
+ lm(dst1, dst2, mem);
+ } else {
+ DCHECK(is_int20(mem.offset()));
+ lmy(dst1, dst2, mem);
+ }
+#endif
}
-
-void MacroAssembler::Cmpli(Register src1, const Operand& src2, Register scratch,
- CRegister cr) {
- intptr_t value = src2.immediate();
- if (is_uint16(value)) {
- cmpli(src1, src2, cr);
+void MacroAssembler::StoreMultipleP(Register src1, Register src2,
+ const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ DCHECK(is_int20(mem.offset()));
+ stmg(src1, src2, mem);
+#else
+ if (is_uint12(mem.offset())) {
+ stm(src1, src2, mem);
} else {
- mov(scratch, src2);
- cmpl(src1, scratch, cr);
+ DCHECK(is_int20(mem.offset()));
+ stmy(src1, src2, mem);
}
+#endif
}
-
-void MacroAssembler::Cmpwi(Register src1, const Operand& src2, Register scratch,
- CRegister cr) {
- intptr_t value = src2.immediate();
- if (is_int16(value)) {
- cmpwi(src1, src2, cr);
+void MacroAssembler::LoadMultipleW(Register dst1, Register dst2,
+ const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ lm(dst1, dst2, mem);
} else {
- mov(scratch, src2);
- cmpw(src1, scratch, cr);
+ DCHECK(is_int20(mem.offset()));
+ lmy(dst1, dst2, mem);
}
}
-
-void MacroAssembler::Cmplwi(Register src1, const Operand& src2,
- Register scratch, CRegister cr) {
- intptr_t value = src2.immediate();
- if (is_uint16(value)) {
- cmplwi(src1, src2, cr);
+void MacroAssembler::StoreMultipleW(Register src1, Register src2,
+ const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ stm(src1, src2, mem);
} else {
- mov(scratch, src2);
- cmplw(src1, scratch, cr);
+ DCHECK(is_int20(mem.offset()));
+ stmy(src1, src2, mem);
}
}
+// Load 32-bits and sign extend if necessary.
+void MacroAssembler::LoadW(Register dst, const MemOperand& mem,
+ Register scratch) {
+ int offset = mem.offset();
-void MacroAssembler::And(Register ra, Register rs, const Operand& rb,
- RCBit rc) {
- if (rb.is_reg()) {
- and_(ra, rs, rb.rm(), rc);
+ if (!is_int20(offset)) {
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+#if V8_TARGET_ARCH_S390X
+ lgf(dst, MemOperand(mem.rb(), scratch));
+#else
+ l(dst, MemOperand(mem.rb(), scratch));
+#endif
} else {
- if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == SetRC) {
- andi(ra, rs, rb);
+#if V8_TARGET_ARCH_S390X
+ lgf(dst, mem);
+#else
+ if (is_uint12(offset)) {
+ l(dst, mem);
} else {
- // mov handles the relocation.
- DCHECK(!rs.is(r0));
- mov(r0, rb);
- and_(ra, rs, r0, rc);
+ ly(dst, mem);
}
+#endif
}
}
+// Variable length depending on whether offset fits into immediate field
+// MemOperand of RX or RXY format
+void MacroAssembler::LoadlW(Register dst, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
+ int offset = mem.offset();
-void MacroAssembler::Or(Register ra, Register rs, const Operand& rb, RCBit rc) {
- if (rb.is_reg()) {
- orx(ra, rs, rb.rm(), rc);
+#if V8_TARGET_ARCH_S390X
+ if (is_int20(offset)) {
+ llgf(dst, mem);
+ } else if (!scratch.is(no_reg)) {
+ // Materialize offset into scratch register.
+ LoadIntLiteral(scratch, offset);
+ llgf(dst, MemOperand(base, scratch));
} else {
- if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == LeaveRC) {
- ori(ra, rs, rb);
- } else {
- // mov handles the relocation.
- DCHECK(!rs.is(r0));
- mov(r0, rb);
- orx(ra, rs, r0, rc);
- }
+ DCHECK(false);
+ }
+#else
+ bool use_RXform = false;
+ bool use_RXYform = false;
+ if (is_uint12(offset)) {
+ // RX-format supports unsigned 12-bits offset.
+ use_RXform = true;
+ } else if (is_int20(offset)) {
+ // RXY-format supports signed 20-bits offset.
+ use_RXYform = true;
+ } else if (!scratch.is(no_reg)) {
+ // Materialize offset into scratch register.
+ LoadIntLiteral(scratch, offset);
+ } else {
+ DCHECK(false);
}
-}
-
-void MacroAssembler::Xor(Register ra, Register rs, const Operand& rb,
- RCBit rc) {
- if (rb.is_reg()) {
- xor_(ra, rs, rb.rm(), rc);
+ if (use_RXform) {
+ l(dst, mem);
+ } else if (use_RXYform) {
+ ly(dst, mem);
} else {
- if (is_uint16(rb.imm_) && RelocInfo::IsNone(rb.rmode_) && rc == LeaveRC) {
- xori(ra, rs, rb);
- } else {
- // mov handles the relocation.
- DCHECK(!rs.is(r0));
- mov(r0, rb);
- xor_(ra, rs, r0, rc);
- }
+ ly(dst, MemOperand(base, scratch));
}
+#endif
}
-
-void MacroAssembler::CmpSmiLiteral(Register src1, Smi* smi, Register scratch,
- CRegister cr) {
-#if V8_TARGET_ARCH_PPC64
- LoadSmiLiteral(scratch, smi);
- cmp(src1, scratch, cr);
+void MacroAssembler::LoadB(Register dst, const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ lgb(dst, mem);
#else
- Cmpi(src1, Operand(smi), scratch, cr);
+ lb(dst, mem);
#endif
}
-
-void MacroAssembler::CmplSmiLiteral(Register src1, Smi* smi, Register scratch,
- CRegister cr) {
-#if V8_TARGET_ARCH_PPC64
- LoadSmiLiteral(scratch, smi);
- cmpl(src1, scratch, cr);
+void MacroAssembler::LoadlB(Register dst, const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ llgc(dst, mem);
#else
- Cmpli(src1, Operand(smi), scratch, cr);
+ llc(dst, mem);
#endif
}
+// Load And Test (Reg <- Reg)
+void MacroAssembler::LoadAndTest32(Register dst, Register src) {
+ ltr(dst, src);
+}
-void MacroAssembler::AddSmiLiteral(Register dst, Register src, Smi* smi,
- Register scratch) {
-#if V8_TARGET_ARCH_PPC64
- LoadSmiLiteral(scratch, smi);
- add(dst, src, scratch);
+// Load And Test
+// (Register dst(ptr) = Register src (32 | 32->64))
+// src is treated as a 32-bit signed integer, which is sign extended to
+// 64-bit if necessary.
+void MacroAssembler::LoadAndTestP_ExtendSrc(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ ltgfr(dst, src);
#else
- Add(dst, src, reinterpret_cast<intptr_t>(smi), scratch);
+ ltr(dst, src);
#endif
}
-
-void MacroAssembler::SubSmiLiteral(Register dst, Register src, Smi* smi,
- Register scratch) {
-#if V8_TARGET_ARCH_PPC64
- LoadSmiLiteral(scratch, smi);
- sub(dst, src, scratch);
+// Load And Test Pointer Sized (Reg <- Reg)
+void MacroAssembler::LoadAndTestP(Register dst, Register src) {
+#if V8_TARGET_ARCH_S390X
+ ltgr(dst, src);
#else
- Add(dst, src, -(reinterpret_cast<intptr_t>(smi)), scratch);
+ ltr(dst, src);
#endif
}
+// Load And Test 32-bit (Reg <- Mem)
+void MacroAssembler::LoadAndTest32(Register dst, const MemOperand& mem) {
+ lt_z(dst, mem);
+}
-void MacroAssembler::AndSmiLiteral(Register dst, Register src, Smi* smi,
- Register scratch, RCBit rc) {
-#if V8_TARGET_ARCH_PPC64
- LoadSmiLiteral(scratch, smi);
- and_(dst, src, scratch, rc);
+// Load And Test Pointer Sized (Reg <- Mem)
+void MacroAssembler::LoadAndTestP(Register dst, const MemOperand& mem) {
+#if V8_TARGET_ARCH_S390X
+ ltg(dst, mem);
#else
- And(dst, src, Operand(smi), rc);
+ lt_z(dst, mem);
#endif
}
-
-// Load a "pointer" sized value from the memory location
-void MacroAssembler::LoadP(Register dst, const MemOperand& mem,
- Register scratch) {
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- /* cannot use d-form */
- DCHECK(!scratch.is(no_reg));
- mov(scratch, Operand(offset));
-#if V8_TARGET_ARCH_PPC64
- ldx(dst, MemOperand(mem.ra(), scratch));
-#else
- lwzx(dst, MemOperand(mem.ra(), scratch));
-#endif
+// Load Double Precision (64-bit) Floating Point number from memory
+void MacroAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem) {
+ // for 32bit and 64bit we all use 64bit floating point regs
+ if (is_uint12(mem.offset())) {
+ ld(dst, mem);
} else {
-#if V8_TARGET_ARCH_PPC64
- int misaligned = (offset & 3);
- if (misaligned) {
- // adjust base to conform to offset alignment requirements
- // Todo: enhance to use scratch if dst is unsuitable
- DCHECK(!dst.is(r0));
- addi(dst, mem.ra(), Operand((offset & 3) - 4));
- ld(dst, MemOperand(dst, (offset & ~3) + 4));
- } else {
- ld(dst, mem);
- }
-#else
- lwz(dst, mem);
-#endif
+ ldy(dst, mem);
}
}
-
-// Store a "pointer" sized value to the memory location
-void MacroAssembler::StoreP(Register src, const MemOperand& mem,
- Register scratch) {
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- /* cannot use d-form */
- DCHECK(!scratch.is(no_reg));
- mov(scratch, Operand(offset));
-#if V8_TARGET_ARCH_PPC64
- stdx(src, MemOperand(mem.ra(), scratch));
-#else
- stwx(src, MemOperand(mem.ra(), scratch));
-#endif
+// Load Single Precision (32-bit) Floating Point number from memory
+void MacroAssembler::LoadFloat32(DoubleRegister dst, const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ le_z(dst, mem);
} else {
-#if V8_TARGET_ARCH_PPC64
- int misaligned = (offset & 3);
- if (misaligned) {
- // adjust base to conform to offset alignment requirements
- // a suitable scratch is required here
- DCHECK(!scratch.is(no_reg));
- if (scratch.is(r0)) {
- LoadIntLiteral(scratch, offset);
- stdx(src, MemOperand(mem.ra(), scratch));
- } else {
- addi(scratch, mem.ra(), Operand((offset & 3) - 4));
- std(src, MemOperand(scratch, (offset & ~3) + 4));
- }
- } else {
- std(src, mem);
- }
-#else
- stw(src, mem);
-#endif
+ DCHECK(is_int20(mem.offset()));
+ ley(dst, mem);
}
}
-void MacroAssembler::LoadWordArith(Register dst, const MemOperand& mem,
- Register scratch) {
- int offset = mem.offset();
+// Load Single Precision (32-bit) Floating Point number from memory,
+// and convert to Double Precision (64-bit)
+void MacroAssembler::LoadFloat32ConvertToDouble(DoubleRegister dst,
+ const MemOperand& mem) {
+ LoadFloat32(dst, mem);
+ ldebr(dst, dst);
+}
- if (!is_int16(offset)) {
- DCHECK(!scratch.is(no_reg));
- mov(scratch, Operand(offset));
- lwax(dst, MemOperand(mem.ra(), scratch));
+// Store Double Precision (64-bit) Floating Point number to memory
+void MacroAssembler::StoreDouble(DoubleRegister dst, const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ std(dst, mem);
} else {
-#if V8_TARGET_ARCH_PPC64
- int misaligned = (offset & 3);
- if (misaligned) {
- // adjust base to conform to offset alignment requirements
- // Todo: enhance to use scratch if dst is unsuitable
- DCHECK(!dst.is(r0));
- addi(dst, mem.ra(), Operand((offset & 3) - 4));
- lwa(dst, MemOperand(dst, (offset & ~3) + 4));
- } else {
- lwa(dst, mem);
- }
-#else
- lwz(dst, mem);
-#endif
+ stdy(dst, mem);
}
}
-
-// Variable length depending on whether offset fits into immediate field
-// MemOperand currently only supports d-form
-void MacroAssembler::LoadWord(Register dst, const MemOperand& mem,
- Register scratch) {
- Register base = mem.ra();
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- LoadIntLiteral(scratch, offset);
- lwzx(dst, MemOperand(base, scratch));
+// Store Single Precision (32-bit) Floating Point number to memory
+void MacroAssembler::StoreFloat32(DoubleRegister src, const MemOperand& mem) {
+ if (is_uint12(mem.offset())) {
+ ste(src, mem);
} else {
- lwz(dst, mem);
+ stey(src, mem);
}
}
+// Convert Double precision (64-bit) to Single Precision (32-bit)
+// and store resulting Float32 to memory
+void MacroAssembler::StoreDoubleAsFloat32(DoubleRegister src,
+ const MemOperand& mem,
+ DoubleRegister scratch) {
+ ledbr(scratch, src);
+ StoreFloat32(scratch, mem);
+}
// Variable length depending on whether offset fits into immediate field
-// MemOperand current only supports d-form
-void MacroAssembler::StoreWord(Register src, const MemOperand& mem,
- Register scratch) {
- Register base = mem.ra();
+// MemOperand of RX or RXY format
+void MacroAssembler::StoreW(Register src, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
int offset = mem.offset();
- if (!is_int16(offset)) {
+ bool use_RXform = false;
+ bool use_RXYform = false;
+
+ if (is_uint12(offset)) {
+ // RX-format supports unsigned 12-bits offset.
+ use_RXform = true;
+ } else if (is_int20(offset)) {
+ // RXY-format supports signed 20-bits offset.
+ use_RXYform = true;
+ } else if (!scratch.is(no_reg)) {
+ // Materialize offset into scratch register.
LoadIntLiteral(scratch, offset);
- stwx(src, MemOperand(base, scratch));
} else {
- stw(src, mem);
+ // scratch is no_reg
+ DCHECK(false);
}
-}
-
-void MacroAssembler::LoadHalfWordArith(Register dst, const MemOperand& mem,
- Register scratch) {
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- DCHECK(!scratch.is(no_reg));
- mov(scratch, Operand(offset));
- lhax(dst, MemOperand(mem.ra(), scratch));
+ if (use_RXform) {
+ st(src, mem);
+ } else if (use_RXYform) {
+ sty(src, mem);
} else {
- lha(dst, mem);
+ StoreW(src, MemOperand(base, scratch));
}
}
-
-// Variable length depending on whether offset fits into immediate field
-// MemOperand currently only supports d-form
-void MacroAssembler::LoadHalfWord(Register dst, const MemOperand& mem,
- Register scratch) {
- Register base = mem.ra();
+// Loads 16-bits half-word value from memory and sign extends to pointer
+// sized register
+void MacroAssembler::LoadHalfWordP(Register dst, const MemOperand& mem,
+ Register scratch) {
+ Register base = mem.rb();
int offset = mem.offset();
- if (!is_int16(offset)) {
+ if (!is_int20(offset)) {
+ DCHECK(!scratch.is(no_reg));
LoadIntLiteral(scratch, offset);
- lhzx(dst, MemOperand(base, scratch));
+#if V8_TARGET_ARCH_S390X
+ lgh(dst, MemOperand(base, scratch));
+#else
+ lh(dst, MemOperand(base, scratch));
+#endif
} else {
- lhz(dst, mem);
+#if V8_TARGET_ARCH_S390X
+ lgh(dst, mem);
+#else
+ if (is_uint12(offset)) {
+ lh(dst, mem);
+ } else {
+ lhy(dst, mem);
+ }
+#endif
}
}
-
// Variable length depending on whether offset fits into immediate field
// MemOperand current only supports d-form
void MacroAssembler::StoreHalfWord(Register src, const MemOperand& mem,
Register scratch) {
- Register base = mem.ra();
+ Register base = mem.rb();
int offset = mem.offset();
- if (!is_int16(offset)) {
- LoadIntLiteral(scratch, offset);
- sthx(src, MemOperand(base, scratch));
- } else {
+ if (is_uint12(offset)) {
sth(src, mem);
- }
-}
-
-
-// Variable length depending on whether offset fits into immediate field
-// MemOperand currently only supports d-form
-void MacroAssembler::LoadByte(Register dst, const MemOperand& mem,
- Register scratch) {
- Register base = mem.ra();
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- LoadIntLiteral(scratch, offset);
- lbzx(dst, MemOperand(base, scratch));
+ } else if (is_int20(offset)) {
+ sthy(src, mem);
} else {
- lbz(dst, mem);
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+ sth(src, MemOperand(base, scratch));
}
}
-
// Variable length depending on whether offset fits into immediate field
// MemOperand current only supports d-form
void MacroAssembler::StoreByte(Register src, const MemOperand& mem,
Register scratch) {
- Register base = mem.ra();
+ Register base = mem.rb();
int offset = mem.offset();
- if (!is_int16(offset)) {
- LoadIntLiteral(scratch, offset);
- stbx(src, MemOperand(base, scratch));
+ if (is_uint12(offset)) {
+ stc(src, mem);
+ } else if (is_int20(offset)) {
+ stcy(src, mem);
} else {
- stb(src, mem);
+ DCHECK(!scratch.is(no_reg));
+ LoadIntLiteral(scratch, offset);
+ stc(src, MemOperand(base, scratch));
}
}
-
-void MacroAssembler::LoadRepresentation(Register dst, const MemOperand& mem,
- Representation r, Register scratch) {
- DCHECK(!r.IsDouble());
- if (r.IsInteger8()) {
- LoadByte(dst, mem, scratch);
- extsb(dst, dst);
- } else if (r.IsUInteger8()) {
- LoadByte(dst, mem, scratch);
- } else if (r.IsInteger16()) {
- LoadHalfWordArith(dst, mem, scratch);
- } else if (r.IsUInteger16()) {
- LoadHalfWord(dst, mem, scratch);
-#if V8_TARGET_ARCH_PPC64
- } else if (r.IsInteger32()) {
- LoadWordArith(dst, mem, scratch);
-#endif
+// Shift left logical for 32-bit integer types.
+void MacroAssembler::ShiftLeft(Register dst, Register src, const Operand& val) {
+ if (dst.is(src)) {
+ sll(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ sllk(dst, src, val);
} else {
- LoadP(dst, mem, scratch);
+ lr(dst, src);
+ sll(dst, val);
}
}
-
-void MacroAssembler::StoreRepresentation(Register src, const MemOperand& mem,
- Representation r, Register scratch) {
- DCHECK(!r.IsDouble());
- if (r.IsInteger8() || r.IsUInteger8()) {
- StoreByte(src, mem, scratch);
- } else if (r.IsInteger16() || r.IsUInteger16()) {
- StoreHalfWord(src, mem, scratch);
-#if V8_TARGET_ARCH_PPC64
- } else if (r.IsInteger32()) {
- StoreWord(src, mem, scratch);
-#endif
+// Shift left logical for 32-bit integer types.
+void MacroAssembler::ShiftLeft(Register dst, Register src, Register val) {
+ if (dst.is(src)) {
+ sll(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ sllk(dst, src, val);
} else {
- if (r.IsHeapObject()) {
- AssertNotSmi(src);
- } else if (r.IsSmi()) {
- AssertSmi(src);
- }
- StoreP(src, mem, scratch);
+ DCHECK(!dst.is(val)); // The lr/sll path clobbers val.
+ lr(dst, src);
+ sll(dst, val);
}
}
-
-void MacroAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem,
- Register scratch) {
- Register base = mem.ra();
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- mov(scratch, Operand(offset));
- lfdx(dst, MemOperand(base, scratch));
+// Shift right logical for 32-bit integer types.
+void MacroAssembler::ShiftRight(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ srl(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srlk(dst, src, val);
} else {
- lfd(dst, mem);
+ lr(dst, src);
+ srl(dst, val);
}
}
-
-void MacroAssembler::StoreDouble(DoubleRegister src, const MemOperand& mem,
- Register scratch) {
- Register base = mem.ra();
- int offset = mem.offset();
-
- if (!is_int16(offset)) {
- mov(scratch, Operand(offset));
- stfdx(src, MemOperand(base, scratch));
+// Shift right logical for 32-bit integer types.
+void MacroAssembler::ShiftRight(Register dst, Register src, Register val) {
+ DCHECK(!dst.is(val)); // The lr/srl path clobbers val.
+ if (dst.is(src)) {
+ srl(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srlk(dst, src, val);
} else {
- stfd(src, mem);
+ lr(dst, src);
+ srl(dst, val);
}
}
-
-void MacroAssembler::TestJSArrayForAllocationMemento(Register receiver_reg,
- Register scratch_reg,
- Label* no_memento_found) {
- ExternalReference new_space_start =
- ExternalReference::new_space_start(isolate());
- ExternalReference new_space_allocation_top =
- ExternalReference::new_space_allocation_top_address(isolate());
- addi(scratch_reg, receiver_reg,
- Operand(JSArray::kSize + AllocationMemento::kSize - kHeapObjectTag));
- Cmpi(scratch_reg, Operand(new_space_start), r0);
- blt(no_memento_found);
- mov(ip, Operand(new_space_allocation_top));
- LoadP(ip, MemOperand(ip));
- cmp(scratch_reg, ip);
- bgt(no_memento_found);
- LoadP(scratch_reg, MemOperand(scratch_reg, -AllocationMemento::kSize));
- Cmpi(scratch_reg, Operand(isolate()->factory()->allocation_memento_map()),
- r0);
+// Shift left arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftLeftArith(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ sla(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ slak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sla(dst, val);
+ }
}
+// Shift left arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftLeftArith(Register dst, Register src, Register val) {
+ DCHECK(!dst.is(val)); // The lr/sla path clobbers val.
+ if (dst.is(src)) {
+ sla(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ slak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sla(dst, val);
+ }
+}
-Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3,
- Register reg4, Register reg5,
- Register reg6) {
- RegList regs = 0;
- if (reg1.is_valid()) regs |= reg1.bit();
- if (reg2.is_valid()) regs |= reg2.bit();
- if (reg3.is_valid()) regs |= reg3.bit();
- if (reg4.is_valid()) regs |= reg4.bit();
- if (reg5.is_valid()) regs |= reg5.bit();
- if (reg6.is_valid()) regs |= reg6.bit();
+// Shift right arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftRightArith(Register dst, Register src,
+ const Operand& val) {
+ if (dst.is(src)) {
+ sra(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sra(dst, val);
+ }
+}
- const RegisterConfiguration* config =
- RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT);
- for (int i = 0; i < config->num_allocatable_general_registers(); ++i) {
- int code = config->GetAllocatableGeneralCode(i);
- Register candidate = Register::from_code(code);
- if (regs & candidate.bit()) continue;
- return candidate;
+// Shift right arithmetic for 32-bit integer types.
+void MacroAssembler::ShiftRightArith(Register dst, Register src, Register val) {
+ DCHECK(!dst.is(val)); // The lr/sra path clobbers val.
+ if (dst.is(src)) {
+ sra(dst, val);
+ } else if (CpuFeatures::IsSupported(DISTINCT_OPS)) {
+ srak(dst, src, val);
+ } else {
+ lr(dst, src);
+ sra(dst, val);
}
- UNREACHABLE();
- return no_reg;
}
+// Clear right most # of bits
+void MacroAssembler::ClearRightImm(Register dst, Register src,
+ const Operand& val) {
+ int numBitsToClear = val.imm_ % (kPointerSize * 8);
-void MacroAssembler::JumpIfDictionaryInPrototypeChain(Register object,
- Register scratch0,
- Register scratch1,
- Label* found) {
- DCHECK(!scratch1.is(scratch0));
- Register current = scratch0;
- Label loop_again, end;
+ // Try to use RISBG if possible
+ if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) {
+ int endBit = 63 - numBitsToClear;
+ risbg(dst, src, Operand::Zero(), Operand(endBit), Operand::Zero(), true);
+ return;
+ }
- // scratch contained elements pointer.
- mr(current, object);
- LoadP(current, FieldMemOperand(current, HeapObject::kMapOffset));
- LoadP(current, FieldMemOperand(current, Map::kPrototypeOffset));
- CompareRoot(current, Heap::kNullValueRootIndex);
- beq(&end);
+ uint64_t hexMask = ~((1L << numBitsToClear) - 1);
- // Loop based on the map going up the prototype chain.
- bind(&loop_again);
- LoadP(current, FieldMemOperand(current, HeapObject::kMapOffset));
+ // S390 AND instr clobbers source. Make a copy if necessary
+ if (!dst.is(src)) LoadRR(dst, src);
- STATIC_ASSERT(JS_PROXY_TYPE < JS_OBJECT_TYPE);
- STATIC_ASSERT(JS_VALUE_TYPE < JS_OBJECT_TYPE);
- lbz(scratch1, FieldMemOperand(current, Map::kInstanceTypeOffset));
- cmpi(scratch1, Operand(JS_OBJECT_TYPE));
- blt(found);
+ if (numBitsToClear <= 16) {
+ nill(dst, Operand(static_cast<uint16_t>(hexMask)));
+ } else if (numBitsToClear <= 32) {
+ nilf(dst, Operand(static_cast<uint32_t>(hexMask)));
+ } else if (numBitsToClear <= 64) {
+ nilf(dst, Operand(static_cast<intptr_t>(0)));
+ nihf(dst, Operand(hexMask >> 32));
+ }
+}
- lbz(scratch1, FieldMemOperand(current, Map::kBitField2Offset));
- DecodeField<Map::ElementsKindBits>(scratch1);
- cmpi(scratch1, Operand(DICTIONARY_ELEMENTS));
- beq(found);
- LoadP(current, FieldMemOperand(current, Map::kPrototypeOffset));
- CompareRoot(current, Heap::kNullValueRootIndex);
- bne(&loop_again);
+void MacroAssembler::Popcnt32(Register dst, Register src) {
+ DCHECK(!src.is(r0));
+ DCHECK(!dst.is(r0));
- bind(&end);
+ popcnt(dst, src);
+ ShiftRight(r0, dst, Operand(16));
+ ar(dst, r0);
+ ShiftRight(r0, dst, Operand(8));
+ ar(dst, r0);
+ lbr(dst, dst);
}
+#ifdef V8_TARGET_ARCH_S390X
+void MacroAssembler::Popcnt64(Register dst, Register src) {
+ DCHECK(!src.is(r0));
+ DCHECK(!dst.is(r0));
+
+ popcnt(dst, src);
+ ShiftRightP(r0, dst, Operand(32));
+ AddP(dst, r0);
+ ShiftRightP(r0, dst, Operand(16));
+ AddP(dst, r0);
+ ShiftRightP(r0, dst, Operand(8));
+ AddP(dst, r0);
+ lbr(dst, dst);
+}
+#endif
#ifdef DEBUG
bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4,
@@ -4337,11 +5235,10 @@ bool AreAliased(Register reg1, Register reg2, Register reg3, Register reg4,
}
#endif
-
-CodePatcher::CodePatcher(Isolate* isolate, byte* address, int instructions,
+CodePatcher::CodePatcher(Isolate* isolate, byte* address, int size,
FlushICache flush_cache)
: address_(address),
- size_(instructions * Assembler::kInstrSize),
+ size_(size),
masm_(isolate, address, size_ + Assembler::kGap, CodeObjectRequired::kNo),
flush_cache_(flush_cache) {
// Create a new macro assembler pointing to the address of the code to patch.
@@ -4350,7 +5247,6 @@ CodePatcher::CodePatcher(Isolate* isolate, byte* address, int instructions,
DCHECK(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
}
-
CodePatcher::~CodePatcher() {
// Indicate that code has changed.
if (flush_cache_ == FLUSH) {
@@ -4362,26 +5258,6 @@ CodePatcher::~CodePatcher() {
DCHECK(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);
}
-
-void CodePatcher::Emit(Instr instr) { masm()->emit(instr); }
-
-
-void CodePatcher::EmitCondition(Condition cond) {
- Instr instr = Assembler::instr_at(masm_.pc_);
- switch (cond) {
- case eq:
- instr = (instr & ~kCondMask) | BT;
- break;
- case ne:
- instr = (instr & ~kCondMask) | BF;
- break;
- default:
- UNIMPLEMENTED();
- }
- masm_.emit(instr);
-}
-
-
void MacroAssembler::TruncatingDiv(Register result, Register dividend,
int32_t divisor) {
DCHECK(!dividend.is(result));
@@ -4389,21 +5265,35 @@ void MacroAssembler::TruncatingDiv(Register result, Register dividend,
DCHECK(!result.is(r0));
base::MagicNumbersForDivision<uint32_t> mag =
base::SignedDivisionByConstant(static_cast<uint32_t>(divisor));
- mov(r0, Operand(mag.multiplier));
- mulhw(result, dividend, r0);
+#ifdef V8_TARGET_ARCH_S390X
+ LoadRR(result, dividend);
+ MulP(result, Operand(mag.multiplier));
+ ShiftRightArithP(result, result, Operand(32));
+
+#else
+ lay(sp, MemOperand(sp, -kPointerSize));
+ StoreP(r1, MemOperand(sp));
+
+ mov(r1, Operand(mag.multiplier));
+ mr_z(r0, dividend); // r0:r1 = r1 * dividend
+
+ LoadRR(result, r0);
+ LoadP(r1, MemOperand(sp));
+ la(sp, MemOperand(sp, kPointerSize));
+#endif
bool neg = (mag.multiplier & (static_cast<uint32_t>(1) << 31)) != 0;
if (divisor > 0 && neg) {
- add(result, result, dividend);
+ AddP(result, dividend);
}
if (divisor < 0 && !neg && mag.multiplier > 0) {
- sub(result, result, dividend);
+ SubP(result, dividend);
}
- if (mag.shift > 0) srawi(result, result, mag.shift);
+ if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift));
ExtractBit(r0, dividend, 31);
- add(result, result, r0);
+ AddP(result, r0);
}
} // namespace internal
} // namespace v8
-#endif // V8_TARGET_ARCH_PPC
+#endif // V8_TARGET_ARCH_S390
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