| Index: tests_lit/assembler/arm32/lsl.ll
|
| diff --git a/tests_lit/assembler/arm32/lsl.ll b/tests_lit/assembler/arm32/lsl.ll
|
| index e4794bcef472aa63343651c5f3ceedb0c654aee2..14080fc646b46ee29ab598d8aff445d0ec2bf366 100644
|
| --- a/tests_lit/assembler/arm32/lsl.ll
|
| +++ b/tests_lit/assembler/arm32/lsl.ll
|
| @@ -61,3 +61,23 @@ entry:
|
|
|
| ret i32 %shl
|
| }
|
| +
|
| +define internal <4 x i32> @ShlVec(<4 x i32> %a, <4 x i32> %b) {
|
| +; ASM-LABEL:ShlVec:
|
| +; DIS-LABEL:00000020 <ShlVec>:
|
| +; IASM-LABEL:ShlVec:
|
| +
|
| +entry:
|
| +; ASM-NEXT:.LShlVec$entry:
|
| +; IASM-NEXT:.LShlVec$entry:
|
| +
|
| + %shl = shl <4 x i32> %a, %b
|
| +
|
| +; ASM: lsl r0, r0, r1
|
| +; ASM: lsl r0, r0, r1
|
| +; ASM: lsl r0, r0, r1
|
| +; ASM: lsl r0, r0, r1
|
| +; DIS: 28: e1a00110
|
| +
|
| + ret <4 x i32> %shl
|
| +}
|
|
|