ARM32 vector lowering: fabs, scalarize remaining arithmetic operations.

tests_lit/assembler/arm32/lsl.ll

 ; Show that we know how to translate lsl.
 
 ; NOTE: We use -O2 to get rid of memory stores.
 
 ; REQUIRES: allow_dump
 
 ; Compile using standalone assembler.
 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
 ; RUN:   | FileCheck %s --check-prefix=ASM
 
@@ skipping 43 matching lines @@
 
 ; ASM-NEXT:     lsl     r0, r0, r1
 ; DIS-NEXT:  10:        e1a00110
 ; IASM-NEXT:    .byte 0x10
 ; IASM-NEXT:    .byte 0x1
 ; IASM-NEXT:    .byte 0xa0
 ; IASM-NEXT:    .byte 0xe1
 
   ret i32 %shl
 }
+
+define internal <4 x i32> @ShlVec(<4 x i32> %a, <4 x i32> %b) {
+; ASM-LABEL:ShlVec:
+; DIS-LABEL:00000020 <ShlVec>:
+; IASM-LABEL:ShlVec:
+
+entry:
+; ASM-NEXT:.LShlVec$entry:
+; IASM-NEXT:.LShlVec$entry:
+
+  %shl = shl <4 x i32> %a, %b
+
+; ASM:     lsl     r0, r0, r1
+; ASM:     lsl     r0, r0, r1
+; ASM:     lsl     r0, r0, r1
+; ASM:     lsl     r0, r0, r1
+; DIS:  28:        e1a00110
+
+  ret <4 x i32> %shl
+}