Chromium Code Reviews| Index: tests_lit/assembler/arm32/asr.ll |
| diff --git a/tests_lit/assembler/arm32/asr.ll b/tests_lit/assembler/arm32/asr.ll |
| index d728f438786259e60c7a040b80d0feef7bf25937..9460ab62fde39550dac0c03fc535cd5f98ffc49a 100644 |
| --- a/tests_lit/assembler/arm32/asr.ll |
| +++ b/tests_lit/assembler/arm32/asr.ll |
| @@ -61,3 +61,26 @@ entry: |
| ret i32 %v |
| } |
| + |
| +define internal <4 x i32> @AshrVec(<4 x i32> %a, <4 x i32> %b) { |
|
Jim Stichnoth
2016/02/17 04:15:44
What about tests for i16 and i8 vectors?
(same fo
Eric Holk
2016/02/17 19:32:16
I'll add these.
|
| +; ASM-LABEL:AshrVec: |
| +; DIS-LABEL:00000020 <AshrVec>: |
| +; IASM-LABEL:AshrVec: |
| + |
| +entry: |
| +; ASM-NEXT:.LAshrVec$entry: |
| +; IASM-NEXT:.LAshrVec$entry: |
| + |
| + %v = ashr <4 x i32> %a, %b |
| + |
| +; ASM: asr r0, r0, r1 |
| +; ASM: asr r0, r0, r1 |
| +; ASM: asr r0, r0, r1 |
| +; ASM: asr r0, r0, r1 |
| +; DIS: 28: e1a00150 |
| +; DIS: 38: e1a00150 |
| +; DIS: 48: e1a00150 |
| +; DIS: 58: e1a00150 |
| + |
| + ret <4 x i32> %v |
| +} |