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Issue 1677633002: rename MIPS_DSPR2 to DSPR2 for consistency (Closed)

Created:
4 years, 10 months ago by fbarchard1
Modified:
4 years, 10 months ago
Reviewers:
harryjin
Base URL:
https://chromium.googlesource.com/libyuv/libyuv@master
Target Ref:
refs/heads/master
Project:
libyuv
Visibility:
Public.

Description

rename MIPS_DSPR2 to DSPR2 for consistency When attempting to normalize function names to end in Row_SIMD it was made harder with MIPS_DSPR2 naming convention. Other CPUs do not include the vendor. This should be named consistently. Removed the DISABLE_MIPS in favour of DISABLE_ASM for consistency with other processors. TBR=harryjin@google.com BUG=libyuv:562 Committed: https://chromium.googlesource.com/libyuv/libyuv/+/0d880e5bc07cde197a5a0a4e1bb4bda408373f6f

Patch Set 1 #

Patch Set 2 : git cl try #

Unified diffs Side-by-side diffs Delta from patch set Stats (+213 lines, -219 lines) Patch
M README.chromium View 1 chunk +1 line, -1 line 0 comments Download
M include/libyuv/cpu_id.h View 1 chunk +1 line, -1 line 0 comments Download
M include/libyuv/rotate_row.h View 5 chunks +7 lines, -7 lines 0 comments Download
M include/libyuv/row.h View 1 8 chunks +30 lines, -31 lines 0 comments Download
M include/libyuv/scale_row.h View 2 chunks +14 lines, -14 lines 0 comments Download
M include/libyuv/version.h View 1 chunk +1 line, -1 line 0 comments Download
M source/convert.cc View 1 chunk +4 lines, -4 lines 0 comments Download
M source/convert_argb.cc View 3 chunks +9 lines, -9 lines 0 comments Download
M source/convert_from.cc View 2 chunks +6 lines, -6 lines 0 comments Download
M source/cpu_id.cc View 1 chunk +3 lines, -7 lines 0 comments Download
M source/planar_functions.cc View 3 chunks +9 lines, -9 lines 0 comments Download
M source/rotate.cc View 4 chunks +13 lines, -13 lines 0 comments Download
M source/rotate_any.cc View 2 chunks +4 lines, -4 lines 0 comments Download
M source/rotate_mips.cc View 3 chunks +3 lines, -3 lines 0 comments Download
M source/row_any.cc View 2 chunks +4 lines, -4 lines 0 comments Download
M source/row_mips.cc View 5 chunks +6 lines, -6 lines 0 comments Download
M source/scale.cc View 12 chunks +52 lines, -52 lines 0 comments Download
M source/scale_argb.cc View 1 5 chunks +13 lines, -14 lines 0 comments Download
M source/scale_common.cc View 2 chunks +8 lines, -8 lines 0 comments Download
M source/scale_mips.cc View 10 chunks +21 lines, -21 lines 0 comments Download
M unit_test/cpu_test.cc View 1 chunk +2 lines, -2 lines 0 comments Download
M util/cpuid.c View 1 chunk +2 lines, -2 lines 0 comments Download

Messages

Total messages: 3 (1 generated)
fbarchard1
4 years, 10 months ago (2016-02-05 19:18:04 UTC) #1
fbarchard1
4 years, 10 months ago (2016-02-05 22:49:58 UTC) #3
Message was sent while issue was closed. 
Committed patchset #2 (id:20001) manually as
0d880e5bc07cde197a5a0a4e1bb4bda408373f6f (presubmit successful).

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