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Issue 1677633002: rename MIPS_DSPR2 to DSPR2 for consistency (Closed) Base URL: https://chromium.googlesource.com/libyuv/libyuv@master
Patch Set: git cl try Created 4 years, 10 months ago
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1 /* 1 /*
2 * Copyright 2011 The LibYuv Project Authors. All rights reserved. 2 * Copyright 2011 The LibYuv Project Authors. All rights reserved.
3 * 3 *
4 * Use of this source code is governed by a BSD-style license 4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source 5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found 6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may 7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree. 8 * be found in the AUTHORS file in the root of the source tree.
9 */ 9 */
10 10
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248 #endif 248 #endif
249 #if defined(HAS_MIRRORROW_AVX2) 249 #if defined(HAS_MIRRORROW_AVX2)
250 if (TestCpuFlag(kCpuHasAVX2)) { 250 if (TestCpuFlag(kCpuHasAVX2)) {
251 MirrorRow = MirrorRow_Any_AVX2; 251 MirrorRow = MirrorRow_Any_AVX2;
252 if (IS_ALIGNED(width, 32)) { 252 if (IS_ALIGNED(width, 32)) {
253 MirrorRow = MirrorRow_AVX2; 253 MirrorRow = MirrorRow_AVX2;
254 } 254 }
255 } 255 }
256 #endif 256 #endif
257 // TODO(fbarchard): Mirror on mips handle unaligned memory. 257 // TODO(fbarchard): Mirror on mips handle unaligned memory.
258 #if defined(HAS_MIRRORROW_MIPS_DSPR2) 258 #if defined(HAS_MIRRORROW_DSPR2)
259 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && 259 if (TestCpuFlag(kCpuHasDSPR2) &&
260 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && 260 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
261 IS_ALIGNED(dst_y, 4) && IS_ALIGNED(dst_stride_y, 4)) { 261 IS_ALIGNED(dst_y, 4) && IS_ALIGNED(dst_stride_y, 4)) {
262 MirrorRow = MirrorRow_MIPS_DSPR2; 262 MirrorRow = MirrorRow_DSPR2;
263 } 263 }
264 #endif 264 #endif
265 265
266 // Mirror plane 266 // Mirror plane
267 for (y = 0; y < height; ++y) { 267 for (y = 0; y < height; ++y) {
268 MirrorRow(src_y, dst_y, width); 268 MirrorRow(src_y, dst_y, width);
269 src_y += src_stride_y; 269 src_y += src_stride_y;
270 dst_y += dst_stride_y; 270 dst_y += dst_stride_y;
271 } 271 }
272 } 272 }
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979 } 979 }
980 #endif 980 #endif
981 #if defined(HAS_I422TORGBAROW_NEON) 981 #if defined(HAS_I422TORGBAROW_NEON)
982 if (TestCpuFlag(kCpuHasNEON)) { 982 if (TestCpuFlag(kCpuHasNEON)) {
983 I422ToRGBARow = I422ToRGBARow_Any_NEON; 983 I422ToRGBARow = I422ToRGBARow_Any_NEON;
984 if (IS_ALIGNED(width, 8)) { 984 if (IS_ALIGNED(width, 8)) {
985 I422ToRGBARow = I422ToRGBARow_NEON; 985 I422ToRGBARow = I422ToRGBARow_NEON;
986 } 986 }
987 } 987 }
988 #endif 988 #endif
989 #if defined(HAS_I422TORGBAROW_MIPS_DSPR2) 989 #if defined(HAS_I422TORGBAROW_DSPR2)
990 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && IS_ALIGNED(width, 4) && 990 if (TestCpuFlag(kCpuHasDSPR2) && IS_ALIGNED(width, 4) &&
991 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) && 991 IS_ALIGNED(src_y, 4) && IS_ALIGNED(src_stride_y, 4) &&
992 IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) && 992 IS_ALIGNED(src_u, 2) && IS_ALIGNED(src_stride_u, 2) &&
993 IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) && 993 IS_ALIGNED(src_v, 2) && IS_ALIGNED(src_stride_v, 2) &&
994 IS_ALIGNED(dst_rgba, 4) && IS_ALIGNED(dst_stride_rgba, 4)) { 994 IS_ALIGNED(dst_rgba, 4) && IS_ALIGNED(dst_stride_rgba, 4)) {
995 I422ToRGBARow = I422ToRGBARow_MIPS_DSPR2; 995 I422ToRGBARow = I422ToRGBARow_DSPR2;
996 } 996 }
997 #endif 997 #endif
998 998
999 for (y = 0; y < height; ++y) { 999 for (y = 0; y < height; ++y) {
1000 I422ToRGBARow(src_y, src_u, src_v, dst_rgba, yuvconstants, width); 1000 I422ToRGBARow(src_y, src_u, src_v, dst_rgba, yuvconstants, width);
1001 dst_rgba += dst_stride_rgba; 1001 dst_rgba += dst_stride_rgba;
1002 src_y += src_stride_y; 1002 src_y += src_stride_y;
1003 src_u += src_stride_u; 1003 src_u += src_stride_u;
1004 src_v += src_stride_v; 1004 src_v += src_stride_v;
1005 } 1005 }
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1899 } 1899 }
1900 #endif 1900 #endif
1901 #if defined(HAS_INTERPOLATEROW_NEON) 1901 #if defined(HAS_INTERPOLATEROW_NEON)
1902 if (TestCpuFlag(kCpuHasNEON)) { 1902 if (TestCpuFlag(kCpuHasNEON)) {
1903 InterpolateRow = InterpolateRow_Any_NEON; 1903 InterpolateRow = InterpolateRow_Any_NEON;
1904 if (IS_ALIGNED(width, 16)) { 1904 if (IS_ALIGNED(width, 16)) {
1905 InterpolateRow = InterpolateRow_NEON; 1905 InterpolateRow = InterpolateRow_NEON;
1906 } 1906 }
1907 } 1907 }
1908 #endif 1908 #endif
1909 #if defined(HAS_INTERPOLATEROW_MIPS_DSPR2) 1909 #if defined(HAS_INTERPOLATEROW_DSPR2)
1910 if (TestCpuFlag(kCpuHasMIPS_DSPR2) && 1910 if (TestCpuFlag(kCpuHasDSPR2) &&
1911 IS_ALIGNED(src0, 4) && IS_ALIGNED(src_stride0, 4) && 1911 IS_ALIGNED(src0, 4) && IS_ALIGNED(src_stride0, 4) &&
1912 IS_ALIGNED(src1, 4) && IS_ALIGNED(src_stride1, 4) && 1912 IS_ALIGNED(src1, 4) && IS_ALIGNED(src_stride1, 4) &&
1913 IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4) && 1913 IS_ALIGNED(dst, 4) && IS_ALIGNED(dst_stride, 4) &&
1914 IS_ALIGNED(width, 4)) { 1914 IS_ALIGNED(width, 4)) {
1915 InterpolateRow = InterpolateRow_MIPS_DSPR2; 1915 InterpolateRow = InterpolateRow_DSPR2;
1916 } 1916 }
1917 #endif 1917 #endif
1918 1918
1919 for (y = 0; y < height; ++y) { 1919 for (y = 0; y < height; ++y) {
1920 InterpolateRow(dst, src0, src1 - src0, 1920 InterpolateRow(dst, src0, src1 - src0,
1921 width, interpolation); 1921 width, interpolation);
1922 src0 += src_stride0; 1922 src0 += src_stride0;
1923 src1 += src_stride1; 1923 src1 += src_stride1;
1924 dst += dst_stride; 1924 dst += dst_stride;
1925 } 1925 }
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2620 } 2620 }
2621 free_aligned_buffer_64(rows); 2621 free_aligned_buffer_64(rows);
2622 } 2622 }
2623 return 0; 2623 return 0;
2624 } 2624 }
2625 2625
2626 #ifdef __cplusplus 2626 #ifdef __cplusplus
2627 } // extern "C" 2627 } // extern "C"
2628 } // namespace libyuv 2628 } // namespace libyuv
2629 #endif 2629 #endif
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