Subzero: ARM32: lowering of vector insert and extract.

src/IceRegistersARM32.h

Index: src/IceRegistersARM32.h
diff --git a/src/IceRegistersARM32.h b/src/IceRegistersARM32.h
index 94f45c137557cb8b03329330ccb0ae547ca1ea76..079898472768d61faf7612da9a020e3c6ee73b08 100644
--- a/src/IceRegistersARM32.h
+++ b/src/IceRegistersARM32.h
@@ -220,7 +220,11 @@ static inline IceString getRegName(int32_t RegNum) {
 }
 
 // Extend enum RegClass with ARM32-specific register classes (if any).

[Jim Stichnoth, 2016/02/03 15:28:37]

I guess the "(if any)" comment can be dropped.

[Eric Holk, 2016/02/03 21:02:21]

Done.

-enum RegClassARM32 : uint8_t { RCARM32_NUM = RC_Target };
+enum RegClassARM32 : uint8_t {
+  RCARM32_QtoS = RC_Target, // Denotes Q registers that are aliased by S
+                            // registers.
+  RCARM32_NUM
+};
 
 } // end of namespace RegARM32
 } // end of namespace ARM32