Index: src/IceTargetLoweringARM32.h |
diff --git a/src/IceTargetLoweringARM32.h b/src/IceTargetLoweringARM32.h |
index af55141c9ca34ff6be36b379707fcc59f83bf929..9d24b9f91f73c23bcc2f47f11af722ef597f1388 100644 |
--- a/src/IceTargetLoweringARM32.h |
+++ b/src/IceTargetLoweringARM32.h |
@@ -85,13 +85,19 @@ public: |
const llvm::SmallBitVector & |
getRegistersForVariable(const Variable *Var) const override { |
RegClass RC = Var->getRegClass(); |
- assert(RC < RC_Target); |
- return TypeToRegisterSet[RC]; |
+ switch (RC) { |
+ default: |
+ assert(RC < RC_Target); |
+ return TypeToRegisterSet[RC]; |
+ case RegARM32::RCARM32_QtoS: |
+ assert(RegARM32::RCARM32_QtoS < RegARM32::RCARM32_NUM); |
Jim Stichnoth
2016/02/03 15:28:38
I think this assert is pretty much guaranteed to b
Eric Holk
2016/02/03 21:02:22
Done.
|
+ return TypeToRegisterSet[RC]; |
+ } |
} |
const llvm::SmallBitVector & |
getAllRegistersForVariable(const Variable *Var) const override { |
RegClass RC = Var->getRegClass(); |
- assert(RC < RC_Target); |
+ assert((RegARM32::RegClassARM32)RC < RegARM32::RCARM32_NUM); |
return TypeToRegisterSetUnfiltered[RC]; |
} |
const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override { |
@@ -413,6 +419,20 @@ protected: |
} |
} |
+ // Generates a vmov instruction to extract the given index from a vector |
+ // register. |
+ void _extract(Variable *Dest, Variable *Src, uint32_t Index, |
Jim Stichnoth
2016/02/03 15:28:38
I would probably rename Src to Src0 for consistenc
John
2016/02/03 16:06:52
It's been common practice (at least in the ARM32 b
Eric Holk
2016/02/03 21:02:22
Done.
Eric Holk
2016/02/03 21:02:22
Done.
|
+ CondARM32::Cond Pred = CondARM32::AL) { |
+ Context.insert<InstARM32Extract>(Dest, Src, Index, Pred); |
+ } |
+ |
+ // Generates a vmov instruction to insert a value into the given index of a |
+ // vector register. |
+ void _insert(Variable *Dest, Variable *Val, uint32_t Index, |
Jim Stichnoth
2016/02/03 15:28:38
I would probably rename Val to Src0 for consistenc
Eric Holk
2016/02/03 21:02:22
Done.
|
+ CondARM32::Cond Pred = CondARM32::AL) { |
+ Context.insert<InstARM32Insert>(Dest, Val, Index, Pred); |
+ } |
+ |
// -------------------------------------------------------------------------- |
// Begin bool folding machinery. |
// |