| Index: src/mips/disasm-mips.cc
|
| diff --git a/src/mips/disasm-mips.cc b/src/mips/disasm-mips.cc
|
| index 4602b305d81054a7b4711ee024a8b441bdfe87f5..936514aab2616f0d4250953060f06b4b8f755dae 100644
|
| --- a/src/mips/disasm-mips.cc
|
| +++ b/src/mips/disasm-mips.cc
|
| @@ -74,6 +74,7 @@ class Decoder {
|
| void PrintFt(Instruction* instr);
|
| void PrintFd(Instruction* instr);
|
| void PrintSa(Instruction* instr);
|
| + void PrintLsaSa(Instruction* instr);
|
| void PrintSd(Instruction* instr);
|
| void PrintSs1(Instruction* instr);
|
| void PrintSs2(Instruction* instr);
|
| @@ -219,6 +220,13 @@ void Decoder::PrintSa(Instruction* instr) {
|
| }
|
|
|
|
|
| +// Print the integer value of the sa field of a lsa instruction.
|
| +void Decoder::PrintLsaSa(Instruction* instr) {
|
| + int sa = instr->LsaSaValue() + 1;
|
| + out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", sa);
|
| +}
|
| +
|
| +
|
| // Print the integer value of the rd field, when it is not used as reg.
|
| void Decoder::PrintSd(Instruction* instr) {
|
| int sd = instr->RdValue();
|
| @@ -683,11 +691,17 @@ int Decoder::FormatOption(Instruction* instr, const char* format) {
|
| }
|
| case 's': { // 'sa.
|
| switch (format[1]) {
|
| - case 'a': {
|
| - DCHECK(STRING_STARTS_WITH(format, "sa"));
|
| - PrintSa(instr);
|
| - return 2;
|
| - }
|
| + case 'a':
|
| + if (format[2] == '2') {
|
| + DCHECK(STRING_STARTS_WITH(format, "sa2")); // 'sa2
|
| + PrintLsaSa(instr);
|
| + return 3;
|
| + } else {
|
| + DCHECK(STRING_STARTS_WITH(format, "sa"));
|
| + PrintSa(instr);
|
| + return 2;
|
| + }
|
| + break;
|
| case 'd': {
|
| DCHECK(STRING_STARTS_WITH(format, "sd"));
|
| PrintSd(instr);
|
| @@ -1058,6 +1072,9 @@ void Decoder::DecodeTypeRegisterSPECIAL(Instruction* instr) {
|
| case SRAV:
|
| Format(instr, "srav 'rd, 'rt, 'rs");
|
| break;
|
| + case LSA:
|
| + Format(instr, "lsa 'rd, 'rt, 'rs, 'sa2");
|
| + break;
|
| case MFHI:
|
| if (instr->Bits(25, 16) == 0) {
|
| Format(instr, "mfhi 'rd");
|
|
|