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Unified Diff: src/mips/constants-mips.h

Issue 1545013002: Add assembler test. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: rebased Created 4 years, 11 months ago
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Index: src/mips/constants-mips.h
diff --git a/src/mips/constants-mips.h b/src/mips/constants-mips.h
index bea688ff1ad0fb031e7229db8f3988e79854e5c2..8327501b6f8d7e4ecb6d28e66e939b9c62b34889 100644
--- a/src/mips/constants-mips.h
+++ b/src/mips/constants-mips.h
@@ -261,6 +261,7 @@ const int kRdShift = 11;
const int kRdBits = 5;
const int kSaShift = 6;
const int kSaBits = 5;
+const int kLsaSaBits = 2;
const int kFunctionShift = 0;
const int kFunctionBits = 6;
const int kLuiShift = 16;
@@ -399,6 +400,7 @@ enum SecondaryField : uint32_t {
SRL = ((0U << 3) + 2),
SRA = ((0U << 3) + 3),
SLLV = ((0U << 3) + 4),
+ LSA = ((0U << 3) + 5),
SRLV = ((0U << 3) + 6),
SRAV = ((0U << 3) + 7),
@@ -911,20 +913,21 @@ class Instruction {
FunctionFieldToBitNumber(BREAK) | FunctionFieldToBitNumber(SLL) |
FunctionFieldToBitNumber(SRL) | FunctionFieldToBitNumber(SRA) |
FunctionFieldToBitNumber(SLLV) | FunctionFieldToBitNumber(SRLV) |
- FunctionFieldToBitNumber(SRAV) | FunctionFieldToBitNumber(MFHI) |
- FunctionFieldToBitNumber(MFLO) | FunctionFieldToBitNumber(MULT) |
- FunctionFieldToBitNumber(MULTU) | FunctionFieldToBitNumber(DIV) |
- FunctionFieldToBitNumber(DIVU) | FunctionFieldToBitNumber(ADD) |
- FunctionFieldToBitNumber(ADDU) | FunctionFieldToBitNumber(SUB) |
- FunctionFieldToBitNumber(SUBU) | FunctionFieldToBitNumber(AND) |
- FunctionFieldToBitNumber(OR) | FunctionFieldToBitNumber(XOR) |
- FunctionFieldToBitNumber(NOR) | FunctionFieldToBitNumber(SLT) |
- FunctionFieldToBitNumber(SLTU) | FunctionFieldToBitNumber(TGE) |
- FunctionFieldToBitNumber(TGEU) | FunctionFieldToBitNumber(TLT) |
- FunctionFieldToBitNumber(TLTU) | FunctionFieldToBitNumber(TEQ) |
- FunctionFieldToBitNumber(TNE) | FunctionFieldToBitNumber(MOVZ) |
- FunctionFieldToBitNumber(MOVN) | FunctionFieldToBitNumber(MOVCI) |
- FunctionFieldToBitNumber(SELEQZ_S) | FunctionFieldToBitNumber(SELNEZ_S);
+ FunctionFieldToBitNumber(SRAV) | FunctionFieldToBitNumber(LSA) |
+ FunctionFieldToBitNumber(MFHI) | FunctionFieldToBitNumber(MFLO) |
+ FunctionFieldToBitNumber(MULT) | FunctionFieldToBitNumber(MULTU) |
+ FunctionFieldToBitNumber(DIV) | FunctionFieldToBitNumber(DIVU) |
+ FunctionFieldToBitNumber(ADD) | FunctionFieldToBitNumber(ADDU) |
+ FunctionFieldToBitNumber(SUB) | FunctionFieldToBitNumber(SUBU) |
+ FunctionFieldToBitNumber(AND) | FunctionFieldToBitNumber(OR) |
+ FunctionFieldToBitNumber(XOR) | FunctionFieldToBitNumber(NOR) |
+ FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) |
+ FunctionFieldToBitNumber(TGE) | FunctionFieldToBitNumber(TGEU) |
+ FunctionFieldToBitNumber(TLT) | FunctionFieldToBitNumber(TLTU) |
+ FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) |
+ FunctionFieldToBitNumber(MOVZ) | FunctionFieldToBitNumber(MOVN) |
+ FunctionFieldToBitNumber(MOVCI) | FunctionFieldToBitNumber(SELEQZ_S) |
+ FunctionFieldToBitNumber(SELNEZ_S);
// Get the encoding type of the instruction.
@@ -958,6 +961,11 @@ class Instruction {
return Bits(kSaShift + kSaBits - 1, kSaShift);
}
+ inline int LsaSaValue() const {
+ DCHECK(InstructionType() == kRegisterType);
+ return Bits(kSaShift + kLsaSaBits - 1, kSaShift);
+ }
+
inline int FunctionValue() const {
DCHECK(InstructionType() == kRegisterType ||
InstructionType() == kImmediateType);
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