Subzero: Add Non-SFI support for x86-32.

src/IceTargetLoweringX86Base.h

Index: src/IceTargetLoweringX86Base.h
diff --git a/src/IceTargetLoweringX86Base.h b/src/IceTargetLoweringX86Base.h
index bf430727f1524501dc6d44af1c41687f99a7a189..bfa961e8797a539b02ace66c0d64e6ba4fcbe354 100644
--- a/src/IceTargetLoweringX86Base.h
+++ b/src/IceTargetLoweringX86Base.h
@@ -59,9 +59,12 @@ public:
 
   ~TargetX86Base() override = default;
 
-  static void staticInit();
+  static void staticInit(const ClFlags &Flags);
   static TargetX86Base *create(Cfg *Func) { return new TargetX86Base(Func); }
 
+  static FixupKind getPcRelFixup() { return PcRelFixup; }
+  static FixupKind getRelFixup() { return RelFixup; }
+
   void translateOm1() override;
   void translateO2() override;
   void doLoadOpt();
@@ -126,12 +129,12 @@ public:
 
   void emitVariable(const Variable *Var) const override;
 
-  const char *getConstantPrefix() const final { return "$"; }
-  void emit(const ConstantUndef *C) const final;
   void emit(const ConstantInteger32 *C) const final;
   void emit(const ConstantInteger64 *C) const final;
   void emit(const ConstantFloat *C) const final;
   void emit(const ConstantDouble *C) const final;
+  void emit(const ConstantUndef *C) const final;
+  void emit(const ConstantRelocatable *C) const final;
 
   void initNodeForLowering(CfgNode *Node) override;
 
@@ -265,10 +268,12 @@ protected:
     Legal_Imm = 1 << 1,
     Legal_Mem = 1 << 2, // includes [eax+4*ecx] as well as [esp+12]
     Legal_Rematerializable = 1 << 3,
-    Legal_All = ~Legal_Rematerializable
+    Legal_AddrAbs = 1 << 4, // ConstantRelocatable doesn't have to add GotVar
+    Legal_Default = ~(Legal_Rematerializable | Legal_AddrAbs)
+    // TODO(stichnot): Figure out whether this default works for x86-64.
   };
   using LegalMask = uint32_t;
-  Operand *legalize(Operand *From, LegalMask Allowed = Legal_All,
+  Operand *legalize(Operand *From, LegalMask Allowed = Legal_Default,
                     int32_t RegNum = Variable::NoRegister);
   Variable *legalizeToReg(Operand *From, int32_t RegNum = Variable::NoRegister);
   /// Legalize the first source operand for use in the cmp instruction.
@@ -731,6 +736,9 @@ protected:
   static llvm::SmallBitVector ScratchRegs;
   llvm::SmallBitVector RegsUsed;
   std::array<VarList, IceType_NUM> PhysicalRegisters;
+  // GotVar is a Variable that holds the GlobalOffsetTable address for Non-SFI
+  // mode.
+  Variable *GotVar = nullptr;
 
   /// Randomize a given immediate operand
   Operand *randomizeOrPoolImmediate(Constant *Immediate,
@@ -797,6 +805,10 @@ private:
   /// Optimizations for idiom recognition.
   bool lowerOptimizeFcmpSelect(const InstFcmp *Fcmp, const InstSelect *Select);
 
+  /// Emit code that initializes the value of the GotVar near the start of the
+  /// function.
+  void initGotVar();
+
   /// Complains loudly if invoked because the cpu can handle 64-bit types
   /// natively.
   template <typename T = Traits>
@@ -811,6 +823,9 @@ private:
   lowerIcmp64(const InstIcmp *Icmp, const Inst *Consumer);
 
   BoolFolding FoldingInfo;
+
+  static FixupKind PcRelFixup;

[John, 2015/12/22 15:44:38]

This **really** belong in the Traits classes...

[Jim Stichnoth, 2015/12/28 07:54:07]

The issue here is that the fixup kind used for RelFixup depends on whether we
are generating PIC.  I thought Traits were more about holding const values,
constexpr values, and methods, so I put RelFixup as a static class member.  And
I did the same for PcRelFixup for consistency, even though it could just as well
be a constexpr trait.

I'm not very traits-savvy, so I would appreciate specific guidance here.

+  static FixupKind RelFixup;
 };
 } // end of namespace X86Internal
 } // end of namespace Ice