ARM: Don't generate memory instructions with writeback where the data and address registers are the…

runtime/vm/assembler_arm.cc

Index: runtime/vm/assembler_arm.cc
diff --git a/runtime/vm/assembler_arm.cc b/runtime/vm/assembler_arm.cc
index 6c016c9c21f64efcf27fc0305de4ca087c769d34..8abdfe72b7825e1db1e809da26966bdf20dcbdb6 100644
--- a/runtime/vm/assembler_arm.cc
+++ b/runtime/vm/assembler_arm.cc
@@ -105,6 +105,8 @@ void Assembler::EmitMemOp(Condition cond,
                           Address ad) {
   ASSERT(rd != kNoRegister);
   ASSERT(cond != kNoCondition);
+  ASSERT(!ad.has_writeback() || (ad.rn() != rd));  // Unpredictable.
+
   int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
                      B26 | (ad.kind() == Address::Immediate ? 0 : B25) |
                      (load ? L : 0) |