ARM: Don't generate memory instructions with writeback where the data and address registers are the…

runtime/vm/stub_code_arm.cc

Index: runtime/vm/stub_code_arm.cc
diff --git a/runtime/vm/stub_code_arm.cc b/runtime/vm/stub_code_arm.cc
index 94cf00b33d08a8d5f0183fe5343adce3998d91ae..f36ce1f43b9513773386938617c44ece0ab80df2 100644
--- a/runtime/vm/stub_code_arm.cc
+++ b/runtime/vm/stub_code_arm.cc
@@ -437,6 +437,10 @@ static void GenerateDeoptimizationSequence(Assembler* assembler,
       COMPILE_ASSERT(IP > CODE_REG);  // Assert IP is pushed first.
       __ ldr(IP, Address(FP, kCallerSpSlotFromFp * kWordSize));
       __ Push(IP);
+    } else if (i == SP) {
+      // Push(SP) has unpredictable behavior.
+      __ mov(IP, Operand(SP));

[zra, 2015/11/12 20:37:48]

Does this clobber IP before it has been saved? Does IP need to be saved? The
CODE_REG case seems to be worried about that.

[rmacnak, 2015/11/12 21:15:52]

Hm, this does clobber IP before it has been saved.

Florian, does deopt ever use the saved value of IP? Isn't IP also potentially
clobbered by the call to this stub if the stub is at large pool offset?

[Florian Schneider, 2015/11/13 09:04:06]

IP holds the live value of LR at entry where they are swapped - so the assert
above is overly strict and can be removed.
IP will hold the return address which is stored in the frame on EnterFrame, so
it does not matter.

[rmacnak, 2015/11/13 20:09:12]

Removing the assert for the CODE case.

+      __ Push(IP);
     } else {
       __ Push(static_cast<Register>(i));
     }