Lower a few basic MIPS binops for i{8,16,32,64}.

src/IceTargetLoweringMIPS32.h

Index: src/IceTargetLoweringMIPS32.h
diff --git a/src/IceTargetLoweringMIPS32.h b/src/IceTargetLoweringMIPS32.h
index 6f46b42e060c4d670c8de9a94e5681cc40669bc6..89c76e47e80b2cb84d52690a47efc5230ea07893 100644
--- a/src/IceTargetLoweringMIPS32.h
+++ b/src/IceTargetLoweringMIPS32.h
@@ -90,6 +90,18 @@ public:
     (void)C;
     llvm::report_fatal_error("Not yet implemented");
   }
+
+  // The following are helpers that insert lowered ARM32 instructions with

[Jim Stichnoth, 2015/11/04 14:47:24]

MIPS

[rkotlerimgtec, 2015/11/05 01:28:44]

Done.

+  // minimal syntactic overhead, so that the lowering code can look as close to
+  // assembly as practical.
+  void _add(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Add::create(Func, Dest, Src0, Src1));
+  }
+
+  void _and(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32And::create(Func, Dest, Src0, Src1));
+  }
+
   void _ret(Variable *RA, Variable *Src0 = nullptr) {
     Context.insert(InstMIPS32Ret::create(Func, RA, Src0));
   }
@@ -119,10 +131,26 @@ public:
     }
   }
 
+  void _mul(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert(InstMIPS32Mul::create(Func, Dest, Src0, Src1));
+  }
+
+  void _or(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Or::create(Func, Dest, Src0, Src1));
+  }
+
   void _ori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert(InstMIPS32Ori::create(Func, Dest, Src, Imm));
   }
 
+  void _sub(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Sub::create(Func, Dest, Src0, Src1));
+  }
+
+  void _xor(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Xor::create(Func, Dest, Src0, Src1));
+  }
+
   void lowerArguments() override;
 
   /// Operand legalization helpers.  To deal with address mode constraints,