Lower a few basic MIPS binops for i{8,16,32,64}.

src/IceInstMIPS32.cpp

Index: src/IceInstMIPS32.cpp
diff --git a/src/IceInstMIPS32.cpp b/src/IceInstMIPS32.cpp
index d3c9c187f1e02643d61d6470a7682a47ba8ac8fa..f340221e601711c480b02c054c375963de76a028 100644
--- a/src/IceInstMIPS32.cpp
+++ b/src/IceInstMIPS32.cpp
@@ -51,8 +51,14 @@ const char *InstMIPS32::getWidthString(Type Ty) {
 template <> const char *InstMIPS32Addiu::Opcode = "addiu";
 template <> const char *InstMIPS32Lui::Opcode = "lui";
 template <> const char *InstMIPS32La::Opcode = "la";
-
+// Three-addr ops
+template <> const char *InstMIPS32Add::Opcode = "add";
+template <> const char *InstMIPS32And::Opcode = "and";
+template <> const char *InstMIPS32Mul::Opcode = "mul";
+template <> const char *InstMIPS32Or::Opcode = "or";
 template <> const char *InstMIPS32Ori::Opcode = "ori";
+template <> const char *InstMIPS32Sub::Opcode = "sub";
+template <> const char *InstMIPS32Xor::Opcode = "xor";
 
 InstMIPS32Mov::InstMIPS32Mov(Cfg *Func, Variable *Dest, Operand *Src)
     : InstMIPS32(Func, InstMIPS32::Mov, 2, Dest) {
@@ -104,13 +110,26 @@ void InstMIPS32::emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst,
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrEmit();
-  // Type SrcTy = Inst->getSrc(0)->getType();
   Str << "\t" << Opcode << "\t";
   Inst->getDest()->emit(Func);
   Str << ", ";
   Inst->getSrc(0)->emit(Func);
 }
 
+void InstMIPS32::emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst,
+                               const Cfg *Func) {
+  if (!BuildDefs::dump())
+    return;
+  Ostream &Str = Func->getContext()->getStrEmit();
+  assert(Inst->getSrcSize() == 2);
+  Str << "\t" << Opcode << "\t";
+  Inst->getDest()->emit(Func);
+  Str << ", ";
+  Inst->getSrc(0)->emit(Func);
+  Str << ", ";
+  Inst->getSrc(1)->emit(Func);
+}
+
 void InstMIPS32Ret::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;