Lower a few basic MIPS binops for i{8,16,32,64}.

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 72 matching lines @@
     llvm::report_fatal_error("Not yet implemented");
   }
   void emit(const ConstantFloat *C) const final {
     (void)C;
     llvm::report_fatal_error("Not yet implemented");
   }
   void emit(const ConstantDouble *C) const final {
     (void)C;
     llvm::report_fatal_error("Not yet implemented");
   }
+
+  // The following are helpers that insert lowered ARM32 instructions with

[Jim Stichnoth, 2015/11/04 14:47:24]

MIPS

[rkotlerimgtec, 2015/11/05 01:28:44]

Done.

+  // minimal syntactic overhead, so that the lowering code can look as close to
+  // assembly as practical.
+  void _add(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Add::create(Func, Dest, Src0, Src1));
+  }
+
+  void _and(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32And::create(Func, Dest, Src0, Src1));
+  }
+
   void _ret(Variable *RA, Variable *Src0 = nullptr) {
     Context.insert(InstMIPS32Ret::create(Func, RA, Src0));
   }
 
   void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert(InstMIPS32Addiu::create(Func, Dest, Src, Imm));
   }
 
   void _lui(Variable *Dest, uint32_t Imm) {
     Context.insert(InstMIPS32Lui::create(Func, Dest, Imm));
   }
 
   void _mov(Variable *Dest, Operand *Src0) {
     assert(Dest != nullptr);
     // Variable* Src0_ = llvm::dyn_cast<Variable>(Src0);
     if (llvm::isa<ConstantRelocatable>(Src0)) {
       Context.insert(InstMIPS32La::create(Func, Dest, Src0));
     } else {
       auto *Instr = InstMIPS32Mov::create(Func, Dest, Src0);
       Context.insert(Instr);
       if (Instr->isMultiDest()) {
         // If Instr is multi-dest, then Dest must be a Variable64On32. We add a
         // fake-def for Instr.DestHi here.
         assert(llvm::isa<Variable64On32>(Dest));
         Context.insert(InstFakeDef::create(Func, Instr->getDestHi()));
       }
     }
   }
 
+  void _mul(Variable *Dest, Variable *Src0, Variable *Src1) {
+    Context.insert(InstMIPS32Mul::create(Func, Dest, Src0, Src1));
+  }
+
+  void _or(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Or::create(Func, Dest, Src0, Src1));
+  }
+
   void _ori(Variable *Dest, Variable *Src, uint32_t Imm) {
     Context.insert(InstMIPS32Ori::create(Func, Dest, Src, Imm));
   }
 
+  void _sub(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Sub::create(Func, Dest, Src0, Src1));
+  }
+
+  void _xor(Variable *Dest, Variable *Src0, Operand *Src1) {
+    Context.insert(InstMIPS32Xor::create(Func, Dest, Src0, Src1));
+  }
+
   void lowerArguments() override;
 
   /// Operand legalization helpers.  To deal with address mode constraints,
   /// the helpers will create a new Operand and emit instructions that
   /// guarantee that the Operand kind is one of those indicated by the
   /// LegalMask (a bitmask of allowed kinds).  If the input Operand is known
   /// to already meet the constraints, it may be simply returned as the result,
   /// without creating any new instructions or operands.
   enum OperandLegalization {
     Legal_None = 0,
@@ skipping 109 matching lines @@
 protected:
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H