| Index: src/IceInstX86BaseImpl.h
|
| diff --git a/src/IceInstX86BaseImpl.h b/src/IceInstX86BaseImpl.h
|
| index e109bf2a3350cfab526e87ce517f9411ecf908a5..6494f10c5254156a89bdbd5bf04449a9f7b3bc8c 100644
|
| --- a/src/IceInstX86BaseImpl.h
|
| +++ b/src/IceInstX86BaseImpl.h
|
| @@ -601,7 +601,7 @@ void InstX86Call<Machine>::emitIAS(const Cfg *Func) const {
|
| Target)) {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| - Asm->call(Mem->toAsmAddress(Asm));
|
| + Asm->call(Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Target)) {
|
| assert(CR->getOffset() == 0 && "We only support calling a function");
|
| Asm->call(CR);
|
| @@ -669,7 +669,7 @@ void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op,
|
| } else if (const auto *Mem = llvm::dyn_cast<
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Op)) {
|
| Mem->emitSegmentOverride(Asm);
|
| - (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm));
|
| + (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else {
|
| llvm_unreachable("Unexpected operand type");
|
| }
|
| @@ -706,7 +706,8 @@ void emitIASRegOpTyGPR(
|
| } else if (const auto *Mem = llvm::dyn_cast<
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
|
| Mem->emitSegmentOverride(Asm);
|
| - (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
|
| + (Asm->*(Emitter.GPRAddr))(Ty, VarReg,
|
| + Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
|
| (Asm->*(Emitter.GPRImm))(Ty, VarReg, Immediate(Imm->getValue()));
|
| } else if (const auto *Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
|
| @@ -764,8 +765,8 @@ void emitIASAsAddrOpTyGPR(
|
| typename InstX86Base<Machine>::Traits::Assembler *Asm =
|
| Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
|
| Op0Mem->emitSegmentOverride(Asm);
|
| - emitIASAddrOpTyGPR<Machine>(Func, Ty, Op0Mem->toAsmAddress(Asm), Op1,
|
| - Emitter);
|
| + emitIASAddrOpTyGPR<Machine>(
|
| + Func, Ty, Op0Mem->toAsmAddress(Asm, Func->getTarget()), Op1, Emitter);
|
| } else if (const auto *Split = llvm::dyn_cast<
|
| typename InstX86Base<Machine>::Traits::VariableSplit>(Op0)) {
|
| emitIASAddrOpTyGPR<Machine>(Func, Ty, Split->toAsmAddress(Func), Op1,
|
| @@ -856,7 +857,8 @@ void emitIASXmmShift(
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| - (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
|
| + (Asm->*(Emitter.XmmAddr))(Ty, VarReg,
|
| + Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
|
| (Asm->*(Emitter.XmmImm))(Ty, VarReg, Immediate(Imm->getValue()));
|
| } else {
|
| @@ -890,7 +892,8 @@ void emitIASRegOpTyXMM(
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| - (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
|
| + (Asm->*(Emitter.XmmAddr))(Ty, VarReg,
|
| + Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
|
| (Asm->*(Emitter.XmmAddr))(
|
| Ty, VarReg,
|
| @@ -924,7 +927,8 @@ void emitIASCastRegOp(const Cfg *Func, Type DestTy, const Variable *Dest,
|
| } else if (const auto *Mem = llvm::dyn_cast<
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
|
| Mem->emitSegmentOverride(Asm);
|
| - (Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy, Mem->toAsmAddress(Asm));
|
| + (Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy,
|
| + Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else {
|
| llvm_unreachable("Unexpected operand type");
|
| }
|
| @@ -957,8 +961,8 @@ void emitIASThreeOpImmOps(
|
| } else if (const auto *Mem = llvm::dyn_cast<
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src0)) {
|
| Mem->emitSegmentOverride(Asm);
|
| - (Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, Mem->toAsmAddress(Asm),
|
| - Imm);
|
| + (Asm->*(Emitter.RegAddrImm))(
|
| + DispatchTy, DestReg, Mem->toAsmAddress(Asm, Func->getTarget()), Imm);
|
| } else {
|
| llvm_unreachable("Unexpected operand type");
|
| }
|
| @@ -990,7 +994,8 @@ void emitIASMovlikeXMM(
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
|
| assert(SrcMem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| - (Asm->*(Emitter.XmmAddr))(DestReg, SrcMem->toAsmAddress(Asm));
|
| + (Asm->*(Emitter.XmmAddr))(DestReg,
|
| + SrcMem->toAsmAddress(Asm, Func->getTarget()));
|
| } else {
|
| llvm_unreachable("Unexpected operand type");
|
| }
|
| @@ -1625,7 +1630,7 @@ void InstX86Cmov<Machine>::emitIAS(const Cfg *Func) const {
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| Asm->cmov(SrcTy, Condition, InstX86Base<Machine>::Traits::getEncodedGPR(
|
| this->getDest()->getRegNum()),
|
| - Mem->toAsmAddress(Asm));
|
| + Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else {
|
| llvm_unreachable("Unexpected operand type");
|
| }
|
| @@ -1730,7 +1735,7 @@ void InstX86Cmpxchg<Machine>::emitIAS(const Cfg *Func) const {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| const typename InstX86Base<Machine>::Traits::Address Addr =
|
| - Mem->toAsmAddress(Asm);
|
| + Mem->toAsmAddress(Asm, Func->getTarget());
|
| const auto *VarReg = llvm::cast<Variable>(this->getSrc(2));
|
| assert(VarReg->hasReg());
|
| const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg =
|
| @@ -1774,7 +1779,7 @@ void InstX86Cmpxchg8b<Machine>::emitIAS(const Cfg *Func) const {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| const typename InstX86Base<Machine>::Traits::Address Addr =
|
| - Mem->toAsmAddress(Asm);
|
| + Mem->toAsmAddress(Asm, Func->getTarget());
|
| Asm->cmpxchg8b(Addr, this->Locked);
|
| }
|
|
|
| @@ -2127,7 +2132,7 @@ void InstX86Store<Machine>::emitIAS(const Cfg *Func) const {
|
| Dest);
|
| assert(DestMem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| - Asm->movss(DestTy, DestMem->toAsmAddress(Asm), SrcReg);
|
| + Asm->movss(DestTy, DestMem->toAsmAddress(Asm, Func->getTarget()), SrcReg);
|
| }
|
| return;
|
| } else {
|
| @@ -2176,7 +2181,7 @@ void InstX86StoreP<Machine>::emitIAS(const Cfg *Func) const {
|
| assert(DestMem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| assert(SrcVar->hasReg());
|
| - Asm->movups(DestMem->toAsmAddress(Asm),
|
| + Asm->movups(DestMem->toAsmAddress(Asm, Func->getTarget()),
|
| InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()));
|
| }
|
|
|
| @@ -2218,7 +2223,7 @@ void InstX86StoreQ<Machine>::emitIAS(const Cfg *Func) const {
|
| assert(DestMem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| assert(SrcVar->hasReg());
|
| - Asm->movq(DestMem->toAsmAddress(Asm),
|
| + Asm->movq(DestMem->toAsmAddress(Asm, Func->getTarget()),
|
| InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()));
|
| }
|
|
|
| @@ -2625,7 +2630,7 @@ void InstX86Fld<Machine>::emitIAS(const Cfg *Func) const {
|
| typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| - Asm->fld(Ty, Mem->toAsmAddress(Asm));
|
| + Asm->fld(Ty, Mem->toAsmAddress(Asm, Func->getTarget()));
|
| } else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
|
| Asm->fld(Ty, InstX86Base<Machine>::Traits::Address::ofConstPool(Asm, Imm));
|
| } else {
|
| @@ -3149,7 +3154,7 @@ void InstX86Xadd<Machine>::emitIAS(const Cfg *Func) const {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| const typename InstX86Base<Machine>::Traits::Address Addr =
|
| - Mem->toAsmAddress(Asm);
|
| + Mem->toAsmAddress(Asm, Func->getTarget());
|
| const auto *VarReg = llvm::cast<Variable>(this->getSrc(1));
|
| assert(VarReg->hasReg());
|
| const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg =
|
| @@ -3206,7 +3211,7 @@ void InstX86Xchg<Machine>::emitIAS(const Cfg *Func) const {
|
| assert(Mem->getSegmentRegister() ==
|
| InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
|
| const typename InstX86Base<Machine>::Traits::Address Addr =
|
| - Mem->toAsmAddress(Asm);
|
| + Mem->toAsmAddress(Asm, Func->getTarget());
|
| Asm->xchg(Ty, Addr, Reg1);
|
| }
|
|
|
|
|