Combine allocas

src/IceInstX86BaseImpl.h

 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 568 matching lines @@
     Str << "*";
     getCallTarget()->emit(Func);
   }
   Func->getTarget()->resetStackAdjustment();
 }
 
 template <class Machine>
 void InstX86Call<Machine>::emitIAS(const Cfg *Func) const {
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   Operand *Target = getCallTarget();

[Jim Stichnoth, 2015/11/11 17:39:45]

Rename this to CallTarget, and do
  TargetLowering *Target = Func->getTarget();
and use the new Target in the 2 (?) places below.

Do the same Func->getTarget() ==> Target refactoring in other methods you
touched, as appropriate.

[sehr, 2015/11/11 22:14:10]

I went globally through this file.  There are some idioms that could use
refactoring afterwards, but I will try that in a separate CL.

   if (const auto *Var = llvm::dyn_cast<Variable>(Target)) {
     if (Var->hasReg()) {
       Asm->call(InstX86Base<Machine>::Traits::getEncodedGPR(Var->getRegNum()));
     } else {
       Asm->call(
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(Var));
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(
                  Target)) {
     assert(Mem->getSegmentRegister() ==
            InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
-    Asm->call(Mem->toAsmAddress(Asm));
+    Asm->call(Mem->toAsmAddress(Asm, Func->getTarget()));
   } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Target)) {
     assert(CR->getOffset() == 0 && "We only support calling a function");
     Asm->call(CR);
   } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Target)) {
     Asm->call(Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
   Func->getTarget()->resetStackAdjustment();
 }
@@ skipping 47 matching lines @@
     } else {
       typename InstX86Base<Machine>::Traits::Address StackAddr(
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(Var));
       (Asm->*(Emitter.Addr))(Ty, StackAddr);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Op)) {
     Mem->emitSegmentOverride(Asm);
-    (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm));
+    (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm, Func->getTarget()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine, bool VarCanBeByte, bool SrcCanBeByte>
 void emitIASRegOpTyGPR(
     const Cfg *Func, Type Ty, const Variable *Var, const Operand *Src,
     const typename InstX86Base<Machine>::Traits::Assembler::GPREmitterRegOp
         &Emitter) {
@@ skipping 16 matching lines @@
     } else {
       typename InstX86Base<Machine>::Traits::Address SrcStackAddr =
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
     Mem->emitSegmentOverride(Asm);
-    (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
+    (Asm->*(Emitter.GPRAddr))(Ty, VarReg,
+                              Mem->toAsmAddress(Asm, Func->getTarget()));
   } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.GPRImm))(Ty, VarReg, Immediate(Imm->getValue()));
   } else if (const auto *Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
     AssemblerFixup *Fixup =
         Asm->createFixup(InstX86Base<Machine>::Traits::RelFixup, Reloc);
     (Asm->*(Emitter.GPRImm))(Ty, VarReg, Immediate(Reloc->getOffset(), Fixup));
   } else if (const auto *Split = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::VariableSplit>(Src)) {
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Split->toAsmAddress(Func));
   } else {
@@ skipping 37 matching lines @@
     typename InstX86Base<Machine>::Traits::Address StackAddr(
         static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
             Func->getTarget())
             ->stackVarToAsmOperand(Op0Var));
     emitIASAddrOpTyGPR<Machine>(Func, Ty, StackAddr, Op1, Emitter);
   } else if (const auto *Op0Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Op0)) {
     typename InstX86Base<Machine>::Traits::Assembler *Asm =
         Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
     Op0Mem->emitSegmentOverride(Asm);
-    emitIASAddrOpTyGPR<Machine>(Func, Ty, Op0Mem->toAsmAddress(Asm), Op1,
-                                Emitter);
+    emitIASAddrOpTyGPR<Machine>(
+        Func, Ty, Op0Mem->toAsmAddress(Asm, Func->getTarget()), Op1, Emitter);
   } else if (const auto *Split = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::VariableSplit>(Op0)) {
     emitIASAddrOpTyGPR<Machine>(Func, Ty, Split->toAsmAddress(Func), Op1,
                                 Emitter);
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine>
@@ skipping 70 matching lines @@
       typename InstX86Base<Machine>::Traits::Address SrcStackAddr =
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
     assert(Mem->getSegmentRegister() ==
            InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
-    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
+    (Asm->*(Emitter.XmmAddr))(Ty, VarReg,
+                              Mem->toAsmAddress(Asm, Func->getTarget()));
   } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.XmmImm))(Ty, VarReg, Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine>
 void emitIASRegOpTyXMM(
     const Cfg *Func, Type Ty, const Variable *Var, const Operand *Src,
@@ skipping 13 matching lines @@
       typename InstX86Base<Machine>::Traits::Address SrcStackAddr =
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
     assert(Mem->getSegmentRegister() ==
            InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
-    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
+    (Asm->*(Emitter.XmmAddr))(Ty, VarReg,
+                              Mem->toAsmAddress(Asm, Func->getTarget()));
   } else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
     (Asm->*(Emitter.XmmAddr))(
         Ty, VarReg,
         InstX86Base<Machine>::Traits::Address::ofConstPool(Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine, typename DReg_t, typename SReg_t,
@@ skipping 13 matching lines @@
     } else {
       typename InstX86Base<Machine>::Traits::Address SrcStackAddr =
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy, SrcStackAddr);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
     Mem->emitSegmentOverride(Asm);
-    (Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy, Mem->toAsmAddress(Asm));
+    (Asm->*(Emitter.RegAddr))(DestTy, DestReg, SrcTy,
+                              Mem->toAsmAddress(Asm, Func->getTarget()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine, typename DReg_t, typename SReg_t,
           DReg_t (*destEnc)(int32_t), SReg_t (*srcEnc)(int32_t)>
 void emitIASThreeOpImmOps(
     const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src0,
     const Operand *Src1,
@@ skipping 12 matching lines @@
     } else {
       typename InstX86Base<Machine>::Traits::Address SrcStackAddr =
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, SrcStackAddr, Imm);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src0)) {
     Mem->emitSegmentOverride(Asm);
-    (Asm->*(Emitter.RegAddrImm))(DispatchTy, DestReg, Mem->toAsmAddress(Asm),
-                                 Imm);
+    (Asm->*(Emitter.RegAddrImm))(
+        DispatchTy, DestReg, Mem->toAsmAddress(Asm, Func->getTarget()), Imm);
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine>
 void emitIASMovlikeXMM(
     const Cfg *Func, const Variable *Dest, const Operand *Src,
     const typename InstX86Base<Machine>::Traits::Assembler::XmmEmitterMovOps
         Emitter) {
@@ skipping 11 matching lines @@
         typename InstX86Base<Machine>::Traits::Address StackAddr(
             static_cast<typename InstX86Base<Machine>::Traits::TargetLowering
                             *>(Func->getTarget())
                 ->stackVarToAsmOperand(SrcVar));
         (Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
       }
     } else if (const auto *SrcMem = llvm::dyn_cast<
                    typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
       assert(SrcMem->getSegmentRegister() ==
              InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
-      (Asm->*(Emitter.XmmAddr))(DestReg, SrcMem->toAsmAddress(Asm));
+      (Asm->*(Emitter.XmmAddr))(DestReg,
+                                SrcMem->toAsmAddress(Asm, Func->getTarget()));
     } else {
       llvm_unreachable("Unexpected operand type");
     }
   } else {
     typename InstX86Base<Machine>::Traits::Address StackAddr(
         static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
             Func->getTarget())
             ->stackVarToAsmOperand(Dest));
     // Src must be a register in this case.
     const auto *SrcVar = llvm::cast<Variable>(Src);
@@ skipping 614 matching lines @@
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(SrcVar));
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
     assert(Mem->getSegmentRegister() ==
            InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
     Asm->cmov(SrcTy, Condition, InstX86Base<Machine>::Traits::getEncodedGPR(
                                     this->getDest()->getRegNum()),
-              Mem->toAsmAddress(Asm));
+              Mem->toAsmAddress(Asm, Func->getTarget()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine>
 void InstX86Cmov<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
@@ skipping 84 matching lines @@
   assert(this->getSrcSize() == 3);
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   Type Ty = this->getSrc(0)->getType();
   const auto Mem =
       llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
           this->getSrc(0));
   assert(Mem->getSegmentRegister() ==
          InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
   const typename InstX86Base<Machine>::Traits::Address Addr =
-      Mem->toAsmAddress(Asm);
+      Mem->toAsmAddress(Asm, Func->getTarget());
   const auto *VarReg = llvm::cast<Variable>(this->getSrc(2));
   assert(VarReg->hasReg());
   const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg =
       InstX86Base<Machine>::Traits::getEncodedGPR(VarReg->getRegNum());
   Asm->cmpxchg(Ty, Addr, Reg, this->Locked);
 }
 
 template <class Machine>
 void InstX86Cmpxchg<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
@@ skipping 23 matching lines @@
 void InstX86Cmpxchg8b<Machine>::emitIAS(const Cfg *Func) const {
   assert(this->getSrcSize() == 5);
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   const auto Mem =
       llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
           this->getSrc(0));
   assert(Mem->getSegmentRegister() ==
          InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
   const typename InstX86Base<Machine>::Traits::Address Addr =
-      Mem->toAsmAddress(Asm);
+      Mem->toAsmAddress(Asm, Func->getTarget());
   Asm->cmpxchg8b(Addr, this->Locked);
 }
 
 template <class Machine>
 void InstX86Cmpxchg8b<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (this->Locked) {
     Str << "lock ";
@@ skipping 332 matching lines @@
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(DestVar));
       Asm->movss(DestTy, StackAddr, SrcReg);
     } else {
       const auto DestMem =
           llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
               Dest);
       assert(DestMem->getSegmentRegister() ==
              InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
-      Asm->movss(DestTy, DestMem->toAsmAddress(Asm), SrcReg);
+      Asm->movss(DestTy, DestMem->toAsmAddress(Asm, Func->getTarget()), SrcReg);
     }
     return;
   } else {
     assert(isScalarIntegerType(DestTy));
     static const typename InstX86Base<
         Machine>::Traits::Assembler::GPREmitterAddrOp GPRAddrEmitter = {
         &InstX86Base<Machine>::Traits::Assembler::mov,
         &InstX86Base<Machine>::Traits::Assembler::mov};
     emitIASAsAddrOpTyGPR<Machine>(Func, DestTy, Dest, Src, GPRAddrEmitter);
   }
@@ skipping 28 matching lines @@
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   assert(this->getSrcSize() == 2);
   const auto *SrcVar = llvm::cast<Variable>(this->getSrc(0));
   const auto DestMem =
       llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
           this->getSrc(1));
   assert(DestMem->getSegmentRegister() ==
          InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
   assert(SrcVar->hasReg());
-  Asm->movups(DestMem->toAsmAddress(Asm),
+  Asm->movups(DestMem->toAsmAddress(Asm, Func->getTarget()),
               InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()));
 }
 
 template <class Machine>
 void InstX86StoreP<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storep." << this->getSrc(0)->getType() << " ";
   this->getSrc(1)->dump(Func);
@@ skipping 21 matching lines @@
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   assert(this->getSrcSize() == 2);
   const auto *SrcVar = llvm::cast<Variable>(this->getSrc(0));
   const auto DestMem =
       llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
           this->getSrc(1));
   assert(DestMem->getSegmentRegister() ==
          InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
   assert(SrcVar->hasReg());
-  Asm->movq(DestMem->toAsmAddress(Asm),
+  Asm->movq(DestMem->toAsmAddress(Asm, Func->getTarget()),
             InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()));
 }
 
 template <class Machine>
 void InstX86StoreQ<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storeq." << this->getSrc(0)->getType() << " ";
   this->getSrc(1)->dump(Func);
@@ skipping 386 matching lines @@
       typename InstX86Base<Machine>::Traits::Address StackAddr(
           static_cast<typename InstX86Base<Machine>::Traits::TargetLowering *>(
               Func->getTarget())
               ->stackVarToAsmOperand(Var));
       Asm->fld(Ty, StackAddr);
     }
   } else if (const auto *Mem = llvm::dyn_cast<
                  typename InstX86Base<Machine>::Traits::X86OperandMem>(Src)) {
     assert(Mem->getSegmentRegister() ==
            InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
-    Asm->fld(Ty, Mem->toAsmAddress(Asm));
+    Asm->fld(Ty, Mem->toAsmAddress(Asm, Func->getTarget()));
   } else if (const auto *Imm = llvm::dyn_cast<Constant>(Src)) {
     Asm->fld(Ty, InstX86Base<Machine>::Traits::Address::ofConstPool(Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 template <class Machine> void InstX86Fld<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
@@ skipping 503 matching lines @@
   assert(this->getSrcSize() == 2);
   typename InstX86Base<Machine>::Traits::Assembler *Asm =
       Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
   Type Ty = this->getSrc(0)->getType();
   const auto Mem =
       llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
           this->getSrc(0));
   assert(Mem->getSegmentRegister() ==
          InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
   const typename InstX86Base<Machine>::Traits::Address Addr =
-      Mem->toAsmAddress(Asm);
+      Mem->toAsmAddress(Asm, Func->getTarget());
   const auto *VarReg = llvm::cast<Variable>(this->getSrc(1));
   assert(VarReg->hasReg());
   const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg =
       InstX86Base<Machine>::Traits::getEncodedGPR(VarReg->getRegNum());
   Asm->xadd(Ty, Addr, Reg, this->Locked);
 }
 
 template <class Machine>
 void InstX86Xadd<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
@@ skipping 36 matching lines @@
     Asm->xchg(Ty, Reg0, Reg1);
     return;
   }
 
   const auto *Mem =
       llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>(
           this->getSrc(0));
   assert(Mem->getSegmentRegister() ==
          InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment);
   const typename InstX86Base<Machine>::Traits::Address Addr =
-      Mem->toAsmAddress(Asm);
+      Mem->toAsmAddress(Asm, Func->getTarget());
   Asm->xchg(Ty, Addr, Reg1);
 }
 
 template <class Machine>
 void InstX86Xchg<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = this->getSrc(0)->getType();
   Str << "xchg." << Ty << " ";
@@ skipping 50 matching lines @@
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "IACA_END";
 }
 
 } // end of namespace X86Internal
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H