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Issue 1395693005: Subzero: Implement "second-chance bin-packing" for register allocation. (Closed)

Created:
5 years, 2 months ago by Jim Stichnoth
Modified:
5 years, 2 months ago
CC:
native-client-reviews_googlegroups.com
Base URL:
https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Target Ref:
refs/heads/master
Visibility:
Public.

Description

Subzero: Implement "second-chance bin-packing" for register allocation. If a variable gets a register but is later evicted because of a higher-weight variable, there's a chance that the first variable could have been allocated a register if only its initial choice had been different. To improve this, we keep track of which variables are evicted, and then allow register allocation to run again, focusing only on those once-evicted variables, and not changing any previous register assignments. This can iterate until there are no more evictions. This is more or less what the linear-scan literature describes as "second-chance bin-packing". BUG= https://code.google.com/p/nativeclient/issues/detail?id=4095 R=jpp@chromium.org Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=4001c9394cade69a60a6b798b7ece891f3b68abb

Patch Set 1 #

Total comments: 2

Patch Set 2 : Change the internal flag name. Fix a broken MINIMAL=1 test. #

Unified diffs Side-by-side diffs Delta from patch set Stats (+65 lines, -7 lines) Patch
M src/IceClFlags.h View 1 2 chunks +4 lines, -0 lines 0 comments Download
M src/IceClFlags.cpp View 1 3 chunks +7 lines, -0 lines 0 comments Download
M src/IceDefs.h View 1 chunk +4 lines, -3 lines 0 comments Download
M src/IceRegAlloc.h View 3 chunks +8 lines, -0 lines 0 comments Download
M src/IceRegAlloc.cpp View 5 chunks +30 lines, -0 lines 0 comments Download
M src/IceTargetLowering.cpp View 1 1 chunk +8 lines, -2 lines 0 comments Download
M tests_lit/assembler/arm32/ret.ll View 1 1 chunk +2 lines, -0 lines 0 comments Download
M tests_lit/assembler/x86/jump_encodings.ll View 1 chunk +2 lines, -2 lines 0 comments Download

Messages

Total messages: 8 (1 generated)
Jim Stichnoth
5 years, 2 months ago (2015-10-08 19:48:24 UTC) #2
Jim Stichnoth
5 years, 2 months ago (2015-10-08 19:48:25 UTC) #3
Jim Stichnoth
Ping. I'm especially keen on this since it gives a 10% improvement on bzip2. If ...
5 years, 2 months ago (2015-10-09 20:07:36 UTC) #4
John
lgtm Here's an idea (future work): why not splitting the live ranges that were evicted, ...
5 years, 2 months ago (2015-10-09 20:13:04 UTC) #5
Jim Stichnoth
I also added "REQUIRES: allow_dump" to the new ret.ll test. https://chromiumcodereview.appspot.com/1395693005/diff/1/src/IceClFlags.h File src/IceClFlags.h (right): https://chromiumcodereview.appspot.com/1395693005/diff/1/src/IceClFlags.h#newcode109 ...
5 years, 2 months ago (2015-10-09 21:33:07 UTC) #6
Jim Stichnoth
Committed patchset #2 (id:20001) manually as 4001c9394cade69a60a6b798b7ece891f3b68abb (presubmit successful).
5 years, 2 months ago (2015-10-09 21:33:30 UTC) #7
Jim Stichnoth
5 years, 2 months ago (2015-10-11 15:25:34 UTC) #8
Message was sent while issue was closed.
On 2015/10/09 20:13:04, John wrote:
> lgtm
> 
> Here's an idea (future work): why not splitting the live ranges that were
> evicted, and then rerun the register allocator? Do you think the split ranges
> would help?

Yes, I think live range splitting will have to be done in the future.

We'll need some new machinery to enable this, since variables are assumed to
have a single register and a single live range.  There's also the question of
whether to do splitting and retrying as part of the register allocation pass, or
treat it as regalloc->split->regalloc as you suggest.

In the short term, I'm more likely to first try a post-regalloc pass that tracks
register/variable availability across a basic block, to reduce unnecessary loads
from the stack.

But, doing a proper live range splitting algorithm such as LLVM's Greedy
allocator should make it possible to remove these availability peephole
optimizations.

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