Subzero: Implement "second-chance bin-packing" for register allocation.

tests_lit/assembler/x86/jump_encodings.ll

 ; Tests various aspects of x86 branch encodings (near vs far,
 ; forward vs backward, using CFG labels, or local labels).
 
 ; Use -ffunction-sections so that the offsets reset for each function.
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
 ; RUN:   -ffunction-sections | FileCheck %s
 
 ; Use atomic ops as filler, which shouldn't get optimized out.
 declare void @llvm.nacl.atomic.store.i32(i32, i32*, i32)
 declare i32 @llvm.nacl.atomic.load.i32(i32*, i32)
@@ skipping 154 matching lines @@
   %ptr = inttoptr i32 %iptr to i32*
   call void @llvm.nacl.atomic.store.i32(i32 %val, i32* %ptr, i32 6)
   br label %next2
 next2:
   %cmp = icmp ult i64 %val64, 0
   br i1 %cmp, label %next, label %next2
 }
 ; CHECK-LABEL: test_local_forward_then_back
 ; CHECK:      {{.*}} mov DWORD PTR
 ; CHECK-NEXT: {{.*}} mfence
-; CHECK-NEXT: 16: {{.*}} mov {{.*}},0x1
+; CHECK-NEXT: [[LABEL:[0-9a-f]+]]: {{.*}} mov {{.*}},0x1
 ; CHECK-NEXT: {{.*}} cmp
 ; CHECK-NEXT: {{.*}} jb
 ; CHECK:      {{.*}} jne
-; CHECK:      {{.*}} jmp 16
+; CHECK:      {{.*}} jmp [[LABEL]]
 
 
 ; Test that backward local branches also work and are small.
 ; Some of the atomic instructions use a cmpxchg loop.
 define internal void @test_local_backward(i64 %val64, i32 %iptr, i32 %val) {
 entry:
   br label %next
 next:
   %ptr = inttoptr i32 %iptr to i32*
   %a = call i32 @llvm.nacl.atomic.rmw.i32(i32 5, i32* %ptr, i32 %val, i32 6)
   br label %next2
 next2:
   %success = icmp eq i32 1, %a
   br i1 %success, label %next, label %next2
 }
 ; CHECK-LABEL: test_local_backward
 ; CHECK:       9: {{.*}} mov {{.*}},DWORD
 ; CHECK:       b: {{.*}} mov
 ; CHECK-NEXT:  d: {{.*}} xor
 ; CHECK-NEXT:  f: {{.*}} lock cmpxchg
 ; CHECK-NEXT: 13: 75 f6 jne b
 ; CHECK:      1c: 74 eb je 9