Index: src/arm/cpu-arm.cc |
diff --git a/src/arm/cpu-arm.cc b/src/arm/cpu-arm.cc |
index f291ba92ca04d4267343792a091c90beb80e9ae2..f5d2ab19d13adb1876cd0d7a70350aa20c59f6ad 100644 |
--- a/src/arm/cpu-arm.cc |
+++ b/src/arm/cpu-arm.cc |
@@ -16,28 +16,14 @@ |
#include "src/assembler.h" |
#include "src/macro-assembler.h" |
-#include "src/simulator.h" // for cache flushing. |
namespace v8 { |
namespace internal { |
- |
void CpuFeatures::FlushICache(void* start, size_t size) { |
- if (size == 0) return; |
- |
- if (CpuFeatures::IsSupported(COHERENT_CACHE)) return; |
- |
-#if defined(USE_SIMULATOR) |
- // Not generating ARM instructions for C-code. This means that we are |
- // building an ARM emulator based target. We should notify the simulator |
- // that the Icache was flushed. |
- // None of this code ends up in the snapshot so there are no issues |
- // around whether or not to generate the code when building snapshots. |
- Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size); |
- |
-#elif V8_OS_QNX |
+#if !defined(USE_SIMULATOR) |
+#if V8_OS_QNX |
msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE); |
- |
#else |
register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start); |
register uint32_t end asm("r1") = beg + size; |
@@ -73,6 +59,7 @@ void CpuFeatures::FlushICache(void* start, size_t size) { |
: "memory"); |
#endif |
#endif |
+#endif // !USE_SIMULATOR |
} |
} // namespace internal |