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| 1 // Copyright 2006-2009 the V8 project authors. All rights reserved. | 1 // Copyright 2006-2009 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 // CPU specific code for arm independent of OS goes here. | 5 // CPU specific code for arm independent of OS goes here. |
| 6 #ifdef __arm__ | 6 #ifdef __arm__ |
| 7 #ifdef __QNXNTO__ | 7 #ifdef __QNXNTO__ |
| 8 #include <sys/mman.h> // for cache flushing. | 8 #include <sys/mman.h> // for cache flushing. |
| 9 #undef MAP_TYPE | 9 #undef MAP_TYPE |
| 10 #else | 10 #else |
| 11 #include <sys/syscall.h> // for cache flushing. | 11 #include <sys/syscall.h> // for cache flushing. |
| 12 #endif | 12 #endif |
| 13 #endif | 13 #endif |
| 14 | 14 |
| 15 #if V8_TARGET_ARCH_ARM | 15 #if V8_TARGET_ARCH_ARM |
| 16 | 16 |
| 17 #include "src/assembler.h" | 17 #include "src/assembler.h" |
| 18 #include "src/macro-assembler.h" | 18 #include "src/macro-assembler.h" |
| 19 #include "src/simulator.h" // for cache flushing. | |
| 20 | 19 |
| 21 namespace v8 { | 20 namespace v8 { |
| 22 namespace internal { | 21 namespace internal { |
| 23 | 22 |
| 24 | |
| 25 void CpuFeatures::FlushICache(void* start, size_t size) { | 23 void CpuFeatures::FlushICache(void* start, size_t size) { |
| 26 if (size == 0) return; | 24 #if !defined(USE_SIMULATOR) |
| 27 | 25 #if V8_OS_QNX |
| 28 if (CpuFeatures::IsSupported(COHERENT_CACHE)) return; | |
| 29 | |
| 30 #if defined(USE_SIMULATOR) | |
| 31 // Not generating ARM instructions for C-code. This means that we are | |
| 32 // building an ARM emulator based target. We should notify the simulator | |
| 33 // that the Icache was flushed. | |
| 34 // None of this code ends up in the snapshot so there are no issues | |
| 35 // around whether or not to generate the code when building snapshots. | |
| 36 Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size); | |
| 37 | |
| 38 #elif V8_OS_QNX | |
| 39 msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE); | 26 msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE); |
| 40 | |
| 41 #else | 27 #else |
| 42 register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start); | 28 register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start); |
| 43 register uint32_t end asm("r1") = beg + size; | 29 register uint32_t end asm("r1") = beg + size; |
| 44 register uint32_t flg asm("r2") = 0; | 30 register uint32_t flg asm("r2") = 0; |
| 45 | 31 |
| 46 #ifdef __clang__ | 32 #ifdef __clang__ |
| 47 // This variant of the asm avoids a constant pool entry, which can be | 33 // This variant of the asm avoids a constant pool entry, which can be |
| 48 // problematic when LTO'ing. It is also slightly shorter. | 34 // problematic when LTO'ing. It is also slightly shorter. |
| 49 register uint32_t scno asm("r7") = __ARM_NR_cacheflush; | 35 register uint32_t scno asm("r7") = __ARM_NR_cacheflush; |
| 50 | 36 |
| (...skipping 15 matching lines...) Expand all Loading... |
| 66 // r2 = flags (0) | 52 // r2 = flags (0) |
| 67 " ldr r7, =%c[scno]\n" // r7 = syscall number | 53 " ldr r7, =%c[scno]\n" // r7 = syscall number |
| 68 " svc 0\n" | 54 " svc 0\n" |
| 69 | 55 |
| 70 " pop {r7}\n" | 56 " pop {r7}\n" |
| 71 : | 57 : |
| 72 : "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush) | 58 : "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush) |
| 73 : "memory"); | 59 : "memory"); |
| 74 #endif | 60 #endif |
| 75 #endif | 61 #endif |
| 62 #endif // !USE_SIMULATOR |
| 76 } | 63 } |
| 77 | 64 |
| 78 } // namespace internal | 65 } // namespace internal |
| 79 } // namespace v8 | 66 } // namespace v8 |
| 80 | 67 |
| 81 #endif // V8_TARGET_ARCH_ARM | 68 #endif // V8_TARGET_ARCH_ARM |
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