SIMD plumbing

runtime/vm/flow_graph_compiler_ia32.cc

Index: runtime/vm/flow_graph_compiler_ia32.cc
diff --git a/runtime/vm/flow_graph_compiler_ia32.cc b/runtime/vm/flow_graph_compiler_ia32.cc
index 76f89b84e6c235bc2ce6185336dbc65e2f4bdbdd..6145877974fcbfa4575b258da66c43ad49d0e6d5 100644
--- a/runtime/vm/flow_graph_compiler_ia32.cc
+++ b/runtime/vm/flow_graph_compiler_ia32.cc
@@ -1336,18 +1336,18 @@ void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
   // TODO(vegorov): consider saving only caller save (volatile) registers.
   const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count();
   if (xmm_regs_count > 0) {
-    __ subl(ESP, Immediate(xmm_regs_count * kDoubleSize));
+    __ subl(ESP, Immediate(xmm_regs_count * kFpuRegisterSize));
     // Store XMM registers with the lowest register number at the lowest
     // address.
     intptr_t offset = 0;
     for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) {
       XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx);
       if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) {
-        __ movsd(Address(ESP, offset), xmm_reg);
-        offset += kDoubleSize;
+        __ movups(Address(ESP, offset), xmm_reg);

[Vyacheslav Egorov (Google), 2013/03/17 18:17:10]

I wonder how much slower does this make runtime calls when there are live
doubles.

[Cutch, 2013/03/17 21:52:37]

Can we add a tag in RegisterSet which indicates if an FPU register contains
64-bit or 128-bit data and issue the optimal move?

+        offset += kFpuRegisterSize;
       }
     }
-    ASSERT(offset == (xmm_regs_count * kDoubleSize));
+    ASSERT(offset == (xmm_regs_count * kFpuRegisterSize));
   }
 
   // Store general purpose registers with the highest register number at the
@@ -1378,11 +1378,11 @@ void FlowGraphCompiler::RestoreLiveRegisters(LocationSummary* locs) {
     for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) {
       XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx);
       if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) {
-        __ movsd(xmm_reg, Address(ESP, offset));
-        offset += kDoubleSize;
+        __ movups(xmm_reg, Address(ESP, offset));
+        offset += kFpuRegisterSize;
       }
     }
-    ASSERT(offset == (xmm_regs_count * kDoubleSize));
+    ASSERT(offset == (xmm_regs_count * kFpuRegisterSize));
     __ addl(ESP, Immediate(offset));
   }
 }