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Issue 12871015: SIMD plumbing (Closed) Base URL: https://dart.googlecode.com/svn/branches/bleeding_edge/dart
Patch Set: Fix FPU register move instruction on x64 Created 7 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32.
6 #if defined(TARGET_ARCH_IA32) 6 #if defined(TARGET_ARCH_IA32)
7 7
8 #include "vm/flow_graph_compiler.h" 8 #include "vm/flow_graph_compiler.h"
9 9
10 #include "lib/error.h" 10 #include "lib/error.h"
(...skipping 1318 matching lines...) Expand 10 before | Expand all | Expand 10 after
1329 __ Drop(1); 1329 __ Drop(1);
1330 __ jmp(skip_call); 1330 __ jmp(skip_call);
1331 __ Bind(&fall_through); 1331 __ Bind(&fall_through);
1332 } 1332 }
1333 1333
1334 1334
1335 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) { 1335 void FlowGraphCompiler::SaveLiveRegisters(LocationSummary* locs) {
1336 // TODO(vegorov): consider saving only caller save (volatile) registers. 1336 // TODO(vegorov): consider saving only caller save (volatile) registers.
1337 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count(); 1337 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count();
1338 if (xmm_regs_count > 0) { 1338 if (xmm_regs_count > 0) {
1339 __ subl(ESP, Immediate(xmm_regs_count * kDoubleSize)); 1339 __ subl(ESP, Immediate(xmm_regs_count * kFpuRegisterSize));
1340 // Store XMM registers with the lowest register number at the lowest 1340 // Store XMM registers with the lowest register number at the lowest
1341 // address. 1341 // address.
1342 intptr_t offset = 0; 1342 intptr_t offset = 0;
1343 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) { 1343 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) {
1344 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx); 1344 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx);
1345 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) { 1345 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) {
1346 __ movsd(Address(ESP, offset), xmm_reg); 1346 __ movups(Address(ESP, offset), xmm_reg);
Vyacheslav Egorov (Google) 2013/03/17 18:17:10 I wonder how much slower does this make runtime ca
Cutch 2013/03/17 21:52:37 Can we add a tag in RegisterSet which indicates if
1347 offset += kDoubleSize; 1347 offset += kFpuRegisterSize;
1348 } 1348 }
1349 } 1349 }
1350 ASSERT(offset == (xmm_regs_count * kDoubleSize)); 1350 ASSERT(offset == (xmm_regs_count * kFpuRegisterSize));
1351 } 1351 }
1352 1352
1353 // Store general purpose registers with the highest register number at the 1353 // Store general purpose registers with the highest register number at the
1354 // lowest address. 1354 // lowest address.
1355 for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) { 1355 for (intptr_t reg_idx = 0; reg_idx < kNumberOfCpuRegisters; ++reg_idx) {
1356 Register reg = static_cast<Register>(reg_idx); 1356 Register reg = static_cast<Register>(reg_idx);
1357 if (locs->live_registers()->ContainsRegister(reg)) { 1357 if (locs->live_registers()->ContainsRegister(reg)) {
1358 __ pushl(reg); 1358 __ pushl(reg);
1359 } 1359 }
1360 } 1360 }
(...skipping 10 matching lines...) Expand all
1371 } 1371 }
1372 } 1372 }
1373 1373
1374 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count(); 1374 const intptr_t xmm_regs_count = locs->live_registers()->fpu_regs_count();
1375 if (xmm_regs_count > 0) { 1375 if (xmm_regs_count > 0) {
1376 // XMM registers have the lowest register number at the lowest address. 1376 // XMM registers have the lowest register number at the lowest address.
1377 intptr_t offset = 0; 1377 intptr_t offset = 0;
1378 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) { 1378 for (intptr_t reg_idx = 0; reg_idx < kNumberOfXmmRegisters; ++reg_idx) {
1379 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx); 1379 XmmRegister xmm_reg = static_cast<XmmRegister>(reg_idx);
1380 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) { 1380 if (locs->live_registers()->ContainsFpuRegister(xmm_reg)) {
1381 __ movsd(xmm_reg, Address(ESP, offset)); 1381 __ movups(xmm_reg, Address(ESP, offset));
1382 offset += kDoubleSize; 1382 offset += kFpuRegisterSize;
1383 } 1383 }
1384 } 1384 }
1385 ASSERT(offset == (xmm_regs_count * kDoubleSize)); 1385 ASSERT(offset == (xmm_regs_count * kFpuRegisterSize));
1386 __ addl(ESP, Immediate(offset)); 1386 __ addl(ESP, Immediate(offset));
1387 } 1387 }
1388 } 1388 }
1389 1389
1390 1390
1391 void FlowGraphCompiler::EmitTestAndCall(const ICData& ic_data, 1391 void FlowGraphCompiler::EmitTestAndCall(const ICData& ic_data,
1392 Register class_id_reg, 1392 Register class_id_reg,
1393 intptr_t arg_count, 1393 intptr_t arg_count,
1394 const Array& arg_names, 1394 const Array& arg_names,
1395 Label* deopt, 1395 Label* deopt,
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1708 __ popl(ECX); 1708 __ popl(ECX);
1709 __ popl(EAX); 1709 __ popl(EAX);
1710 } 1710 }
1711 1711
1712 1712
1713 #undef __ 1713 #undef __
1714 1714
1715 } // namespace dart 1715 } // namespace dart
1716 1716
1717 #endif // defined TARGET_ARCH_IA32 1717 #endif // defined TARGET_ARCH_IA32
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