| Index: src/trusted/validator_arm/gen/arm32_decode.h
|
| ===================================================================
|
| --- src/trusted/validator_arm/gen/arm32_decode.h (revision 10760)
|
| +++ src/trusted/validator_arm/gen/arm32_decode.h (working copy)
|
| @@ -159,11 +159,14 @@
|
| const Actual_BKPT_cccc00010010iiiiiiiiiiii0111iiii_case_1 Actual_BKPT_cccc00010010iiiiiiiiiiii0111iiii_case_1_instance_;
|
| const Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1 Actual_BLX_immediate_1111101hiiiiiiiiiiiiiiiiiiiiiiii_case_1_instance_;
|
| const Actual_BLX_register_cccc000100101111111111110011mmmm_case_1 Actual_BLX_register_cccc000100101111111111110011mmmm_case_1_instance_;
|
| + const Actual_BL_BLX_immediate_cccc1011iiiiiiiiiiiiiiiiiiiiiiii_case_1 Actual_BL_BLX_immediate_cccc1011iiiiiiiiiiiiiiiiiiiiiiii_case_1_instance_;
|
| + const Actual_B_cccc1010iiiiiiiiiiiiiiiiiiiiiiii_case_1 Actual_B_cccc1010iiiiiiiiiiiiiiiiiiiiiiii_case_1_instance_;
|
| const Actual_Bx_cccc000100101111111111110001mmmm_case_1 Actual_Bx_cccc000100101111111111110001mmmm_case_1_instance_;
|
| const Actual_CLZ_cccc000101101111dddd11110001mmmm_case_1 Actual_CLZ_cccc000101101111dddd11110001mmmm_case_1_instance_;
|
| const Actual_CMN_immediate_cccc00110111nnnn0000iiiiiiiiiiii_case_1 Actual_CMN_immediate_cccc00110111nnnn0000iiiiiiiiiiii_case_1_instance_;
|
| const Actual_CMN_register_cccc00010111nnnn0000iiiiitt0mmmm_case_1 Actual_CMN_register_cccc00010111nnnn0000iiiiitt0mmmm_case_1_instance_;
|
| const Actual_CMN_register_shifted_register_cccc00010111nnnn0000ssss0tt1mmmm_case_1 Actual_CMN_register_shifted_register_cccc00010111nnnn0000ssss0tt1mmmm_case_1_instance_;
|
| + const Actual_LDMDA_LDMFA_cccc100000w1nnnnrrrrrrrrrrrrrrrr_case_1 Actual_LDMDA_LDMFA_cccc100000w1nnnnrrrrrrrrrrrrrrrr_case_1_instance_;
|
| const Actual_LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_1 Actual_LDRB_immediate_cccc010pu1w1nnnnttttiiiiiiiiiiii_case_1_instance_;
|
| const Actual_LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_1 Actual_LDRB_literal_cccc0101u1011111ttttiiiiiiiiiiii_case_1_instance_;
|
| const Actual_LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_1 Actual_LDRB_register_cccc011pu1w1nnnnttttiiiiitt0mmmm_case_1_instance_;
|
| @@ -198,6 +201,7 @@
|
| const Actual_SMLAL_A1_cccc0000111shhhhllllmmmm1001nnnn_case_1 Actual_SMLAL_A1_cccc0000111shhhhllllmmmm1001nnnn_case_1_instance_;
|
| const Actual_SMULBB_SMULBT_SMULTB_SMULTT_cccc00010110dddd0000mmmm1xx0nnnn_case_1 Actual_SMULBB_SMULBT_SMULTB_SMULTT_cccc00010110dddd0000mmmm1xx0nnnn_case_1_instance_;
|
| const Actual_SMULL_A1_cccc0000110shhhhllllmmmm1001nnnn_case_1 Actual_SMULL_A1_cccc0000110shhhhllllmmmm1001nnnn_case_1_instance_;
|
| + const Actual_STMDA_STMED_cccc100000w0nnnnrrrrrrrrrrrrrrrr_case_1 Actual_STMDA_STMED_cccc100000w0nnnnrrrrrrrrrrrrrrrr_case_1_instance_;
|
| const Actual_STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_1 Actual_STRB_immediate_cccc010pu1w0nnnnttttiiiiiiiiiiii_case_1_instance_;
|
| const Actual_STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_1 Actual_STRB_register_cccc011pu1w0nnnnttttiiiiitt0mmmm_case_1_instance_;
|
| const Actual_STRD_immediate_cccc000pu1w0nnnnttttiiii1111iiii_case_1 Actual_STRD_immediate_cccc000pu1w0nnnnttttiiii1111iiii_case_1_instance_;
|
| @@ -211,7 +215,6 @@
|
| const Actual_SXTAB16_cccc01101000nnnnddddrr000111mmmm_case_1 Actual_SXTAB16_cccc01101000nnnnddddrr000111mmmm_case_1_instance_;
|
| const Actual_TST_immediate_cccc00110001nnnn0000iiiiiiiiiiii_case_1 Actual_TST_immediate_cccc00110001nnnn0000iiiiiiiiiiii_case_1_instance_;
|
| const Actual_Unnamed_case_1 Actual_Unnamed_case_1_instance_;
|
| - const BranchImmediate24 BranchImmediate24_instance_;
|
| const CondVfpOp CondVfpOp_instance_;
|
| const DataBarrier DataBarrier_instance_;
|
| const Deprecated Deprecated_instance_;
|
| @@ -219,7 +222,6 @@
|
| const Forbidden Forbidden_instance_;
|
| const ForbiddenCondDecoder ForbiddenCondDecoder_instance_;
|
| const InstructionBarrier InstructionBarrier_instance_;
|
| - const LoadRegisterList LoadRegisterList_instance_;
|
| const LoadVectorRegister LoadVectorRegister_instance_;
|
| const LoadVectorRegisterList LoadVectorRegisterList_instance_;
|
| const MoveDoubleVfpRegisterOp MoveDoubleVfpRegisterOp_instance_;
|
| @@ -228,7 +230,6 @@
|
| const PermanentlyUndefined PermanentlyUndefined_instance_;
|
| const PreloadRegisterImm12Op PreloadRegisterImm12Op_instance_;
|
| const PreloadRegisterPairOp PreloadRegisterPairOp_instance_;
|
| - const StoreRegisterList StoreRegisterList_instance_;
|
| const StoreVectorRegister StoreVectorRegister_instance_;
|
| const StoreVectorRegisterList StoreVectorRegisterList_instance_;
|
| const Undefined Undefined_instance_;
|
|
|