Subzero: Add more kinds of RMW lowering.

Subzero: Add more kinds of RMW lowering.

Specifically: sub, and, or, xor; for all integer types.

Turns out that RMW is not possible for fadd/fsub/fmul/fdiv as well as operations on vector types, because the corresponding x86 instructions require the result to be in a physical register.

Refactors the assembler's implementations of add/or/adc/sbb/and/sub/xor/cmp to avoid repetition.

BUG= https://code.google.com/p/nativeclient/issues/detail?id=4095
R=jvoung@chromium.org

Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=cac003e8f33c970e233e4f9194930b7869f0b65a

[Jim Stichnoth, 2015-06-18 17:35:19]

stichnot@chromium.org changed reviewers:
+ jpp@chromium.org, jvoung@chromium.org, kschimpf@google.com,
mtrofin@chromium.org

[jvoung (off chromium), 2015-06-18 18:30:11]

lgtm

[Jim Stichnoth, 2015-06-18 19:49:03]

Committed patchset #2 (id:20001) manually as
cac003e8f33c970e233e4f9194930b7869f0b65a (presubmit successful).