Subzero: Add more kinds of RMW lowering.

src/IceAssemblerX8632.h

 //===- subzero/src/assembler_ia32.h - Assembler for x86-32 ------*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 690 matching lines @@
   void cmp(Type Ty, const Address &address, const Immediate &imm);
 
   void test(Type Ty, GPRRegister reg0, GPRRegister reg1);
   void test(Type Ty, GPRRegister reg, const Immediate &imm);
   void test(Type Ty, const Address &address, GPRRegister reg);
   void test(Type Ty, const Address &address, const Immediate &imm);
 
   void And(Type Ty, GPRRegister dst, GPRRegister src);
   void And(Type Ty, GPRRegister dst, const Address &address);
   void And(Type Ty, GPRRegister dst, const Immediate &imm);
+  void And(Type Ty, const Address &address, GPRRegister reg);
+  void And(Type Ty, const Address &address, const Immediate &imm);
 
   void Or(Type Ty, GPRRegister dst, GPRRegister src);
   void Or(Type Ty, GPRRegister dst, const Address &address);
   void Or(Type Ty, GPRRegister dst, const Immediate &imm);
+  void Or(Type Ty, const Address &address, GPRRegister reg);
+  void Or(Type Ty, const Address &address, const Immediate &imm);
 
   void Xor(Type Ty, GPRRegister dst, GPRRegister src);
   void Xor(Type Ty, GPRRegister dst, const Address &address);
   void Xor(Type Ty, GPRRegister dst, const Immediate &imm);
+  void Xor(Type Ty, const Address &address, GPRRegister reg);
+  void Xor(Type Ty, const Address &address, const Immediate &imm);
 
   void add(Type Ty, GPRRegister dst, GPRRegister src);
   void add(Type Ty, GPRRegister reg, const Address &address);
   void add(Type Ty, GPRRegister reg, const Immediate &imm);
   void add(Type Ty, const Address &address, GPRRegister reg);
   void add(Type Ty, const Address &address, const Immediate &imm);
 
   void adc(Type Ty, GPRRegister dst, GPRRegister src);
   void adc(Type Ty, GPRRegister dst, const Address &address);
   void adc(Type Ty, GPRRegister reg, const Immediate &imm);
+  void adc(Type Ty, const Address &address, GPRRegister reg);
+  void adc(Type Ty, const Address &address, const Immediate &imm);
 
   void sub(Type Ty, GPRRegister dst, GPRRegister src);
   void sub(Type Ty, GPRRegister reg, const Address &address);
   void sub(Type Ty, GPRRegister reg, const Immediate &imm);
+  void sub(Type Ty, const Address &address, GPRRegister reg);
+  void sub(Type Ty, const Address &address, const Immediate &imm);
 
   void sbb(Type Ty, GPRRegister dst, GPRRegister src);
   void sbb(Type Ty, GPRRegister reg, const Address &address);
   void sbb(Type Ty, GPRRegister reg, const Immediate &imm);
+  void sbb(Type Ty, const Address &address, GPRRegister reg);
+  void sbb(Type Ty, const Address &address, const Immediate &imm);
 
   void cbw();
   void cwd();
   void cdq();
 
   void div(Type Ty, GPRRegister reg);
   void div(Type Ty, const Address &address);
 
   void idiv(Type Ty, GPRRegister reg);
   void idiv(Type Ty, const Address &address);
@@ skipping 105 matching lines @@
   void emitGenericShift(int rm, Type Ty, const Operand &operand,
                         GPRRegister shifter);
 
   typedef std::vector<Label *> LabelVector;
   // A vector of pool-allocated x86 labels for CFG nodes.
   LabelVector CfgNodeLabels;
   // A vector of pool-allocated x86 labels for Local labels.
   LabelVector LocalLabels;
 
   Label *GetOrCreateLabel(SizeT Number, LabelVector &Labels);
+
+  // The arith_int() methods factor out the commonality between the encodings of
+  // add(), Or(), adc(), sbb(), And(), sub(), Xor(), and cmp().  The Tag
+  // parameter is statically asserted to be less than 8.
+  template <uint32_t Tag>
+  void arith_int(Type Ty, GPRRegister reg, const Immediate &imm);
+
+  template <uint32_t Tag>
+  void arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1);
+
+  template <uint32_t Tag>
+  void arith_int(Type Ty, GPRRegister reg, const Address &address);
+
+  template <uint32_t Tag>
+  void arith_int(Type Ty, const Address &address, GPRRegister reg);
+
+  template <uint32_t Tag>
+  void arith_int(Type Ty, const Address &address, const Immediate &imm);
 };
 
 inline void AssemblerX8632::emitUint8(uint8_t value) {
   Buffer.emit<uint8_t>(value);
 }
 
 inline void AssemblerX8632::emitInt16(int16_t value) {
   Buffer.emit<int16_t>(value);
 }
 
@@ skipping 13 matching lines @@
 inline void AssemblerX8632::emitFixup(AssemblerFixup *fixup) {
   Buffer.emitFixup(fixup);
 }
 
 inline void AssemblerX8632::emitOperandSizeOverride() { emitUint8(0x66); }
 
 } // end of namespace X8632
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEASSEMBLERX8632_H