OLD | NEW |
1 //===- subzero/src/IceAssemblerX8632.cpp - Assembler for x86-32 ----------===// | 1 //===- subzero/src/IceAssemblerX8632.cpp - Assembler for x86-32 ----------===// |
2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 2 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
3 // for details. All rights reserved. Use of this source code is governed by a | 3 // for details. All rights reserved. Use of this source code is governed by a |
4 // BSD-style license that can be found in the LICENSE file. | 4 // BSD-style license that can be found in the LICENSE file. |
5 // | 5 // |
6 // Modified by the Subzero authors. | 6 // Modified by the Subzero authors. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // The Subzero Code Generator | 10 // The Subzero Code Generator |
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1491 emitUint8(0xDB); | 1491 emitUint8(0xDB); |
1492 emitOperand(0, src); | 1492 emitOperand(0, src); |
1493 } | 1493 } |
1494 | 1494 |
1495 void AssemblerX8632::fincstp() { | 1495 void AssemblerX8632::fincstp() { |
1496 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1496 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1497 emitUint8(0xD9); | 1497 emitUint8(0xD9); |
1498 emitUint8(0xF7); | 1498 emitUint8(0xF7); |
1499 } | 1499 } |
1500 | 1500 |
1501 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Immediate &imm) { | 1501 template <uint32_t Tag> |
| 1502 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg, const Immediate &imm) { |
| 1503 static_assert(Tag < 8, "Tag must be between 0..7"); |
1502 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1504 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1503 if (isByteSizedType(Ty)) { | 1505 if (isByteSizedType(Ty)) { |
1504 emitComplexI8(7, Operand(reg), imm); | 1506 emitComplexI8(Tag, Operand(reg), imm); |
1505 return; | 1507 return; |
1506 } | 1508 } |
1507 if (Ty == IceType_i16) | 1509 if (Ty == IceType_i16) |
1508 emitOperandSizeOverride(); | 1510 emitOperandSizeOverride(); |
1509 emitComplex(Ty, 7, Operand(reg), imm); | 1511 emitComplex(Ty, Tag, Operand(reg), imm); |
1510 } | 1512 } |
1511 | 1513 |
1512 void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) { | 1514 template <uint32_t Tag> |
| 1515 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1) { |
| 1516 static_assert(Tag < 8, "Tag must be between 0..7"); |
1513 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1517 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1514 if (Ty == IceType_i16) | 1518 if (Ty == IceType_i16) |
1515 emitOperandSizeOverride(); | 1519 emitOperandSizeOverride(); |
1516 if (isByteSizedType(Ty)) | 1520 if (isByteSizedType(Ty)) |
1517 emitUint8(0x3A); | 1521 emitUint8(Tag * 8 + 2); |
1518 else | 1522 else |
1519 emitUint8(0x3B); | 1523 emitUint8(Tag * 8 + 3); |
1520 emitRegisterOperand(reg0, reg1); | 1524 emitRegisterOperand(reg0, reg1); |
1521 } | 1525 } |
1522 | 1526 |
1523 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) { | 1527 template <uint32_t Tag> |
| 1528 void AssemblerX8632::arith_int(Type Ty, GPRRegister reg, |
| 1529 const Address &address) { |
| 1530 static_assert(Tag < 8, "Tag must be between 0..7"); |
1524 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1531 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1525 if (Ty == IceType_i16) | 1532 if (Ty == IceType_i16) |
1526 emitOperandSizeOverride(); | 1533 emitOperandSizeOverride(); |
1527 if (isByteSizedType(Ty)) | 1534 if (isByteSizedType(Ty)) |
1528 emitUint8(0x3A); | 1535 emitUint8(Tag * 8 + 2); |
1529 else | 1536 else |
1530 emitUint8(0x3B); | 1537 emitUint8(Tag * 8 + 3); |
1531 emitOperand(reg, address); | 1538 emitOperand(reg, address); |
1532 } | 1539 } |
1533 | 1540 |
1534 void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) { | 1541 template <uint32_t Tag> |
| 1542 void AssemblerX8632::arith_int(Type Ty, const Address &address, |
| 1543 GPRRegister reg) { |
| 1544 static_assert(Tag < 8, "Tag must be between 0..7"); |
1535 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1545 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1536 if (Ty == IceType_i16) | 1546 if (Ty == IceType_i16) |
1537 emitOperandSizeOverride(); | 1547 emitOperandSizeOverride(); |
1538 if (isByteSizedType(Ty)) | 1548 if (isByteSizedType(Ty)) |
1539 emitUint8(0x38); | 1549 emitUint8(Tag * 8 + 0); |
1540 else | 1550 else |
1541 emitUint8(0x39); | 1551 emitUint8(Tag * 8 + 1); |
1542 emitOperand(reg, address); | 1552 emitOperand(reg, address); |
1543 } | 1553 } |
1544 | 1554 |
| 1555 template <uint32_t Tag> |
| 1556 void AssemblerX8632::arith_int(Type Ty, const Address &address, |
| 1557 const Immediate &imm) { |
| 1558 static_assert(Tag < 8, "Tag must be between 0..7"); |
| 1559 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
| 1560 if (isByteSizedType(Ty)) { |
| 1561 emitComplexI8(Tag, address, imm); |
| 1562 return; |
| 1563 } |
| 1564 if (Ty == IceType_i16) |
| 1565 emitOperandSizeOverride(); |
| 1566 emitComplex(Ty, Tag, address, imm); |
| 1567 } |
| 1568 |
| 1569 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Immediate &imm) { |
| 1570 arith_int<7>(Ty, reg, imm); |
| 1571 } |
| 1572 |
| 1573 void AssemblerX8632::cmp(Type Ty, GPRRegister reg0, GPRRegister reg1) { |
| 1574 arith_int<7>(Ty, reg0, reg1); |
| 1575 } |
| 1576 |
| 1577 void AssemblerX8632::cmp(Type Ty, GPRRegister reg, const Address &address) { |
| 1578 arith_int<7>(Ty, reg, address); |
| 1579 } |
| 1580 |
| 1581 void AssemblerX8632::cmp(Type Ty, const Address &address, GPRRegister reg) { |
| 1582 arith_int<7>(Ty, address, reg); |
| 1583 } |
| 1584 |
1545 void AssemblerX8632::cmp(Type Ty, const Address &address, | 1585 void AssemblerX8632::cmp(Type Ty, const Address &address, |
1546 const Immediate &imm) { | 1586 const Immediate &imm) { |
1547 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1587 arith_int<7>(Ty, address, imm); |
1548 if (isByteSizedType(Ty)) { | |
1549 emitComplexI8(7, address, imm); | |
1550 return; | |
1551 } | |
1552 if (Ty == IceType_i16) | |
1553 emitOperandSizeOverride(); | |
1554 emitComplex(Ty, 7, address, imm); | |
1555 } | 1588 } |
1556 | 1589 |
1557 void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) { | 1590 void AssemblerX8632::test(Type Ty, GPRRegister reg1, GPRRegister reg2) { |
1558 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1591 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1559 if (Ty == IceType_i16) | 1592 if (Ty == IceType_i16) |
1560 emitOperandSizeOverride(); | 1593 emitOperandSizeOverride(); |
1561 if (isByteSizedType(Ty)) | 1594 if (isByteSizedType(Ty)) |
1562 emitUint8(0x84); | 1595 emitUint8(0x84); |
1563 else | 1596 else |
1564 emitUint8(0x85); | 1597 emitUint8(0x85); |
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1621 } else { | 1654 } else { |
1622 if (Ty == IceType_i16) | 1655 if (Ty == IceType_i16) |
1623 emitOperandSizeOverride(); | 1656 emitOperandSizeOverride(); |
1624 emitUint8(0xF7); | 1657 emitUint8(0xF7); |
1625 emitOperand(0, addr); | 1658 emitOperand(0, addr); |
1626 emitImmediate(Ty, immediate); | 1659 emitImmediate(Ty, immediate); |
1627 } | 1660 } |
1628 } | 1661 } |
1629 | 1662 |
1630 void AssemblerX8632::And(Type Ty, GPRRegister dst, GPRRegister src) { | 1663 void AssemblerX8632::And(Type Ty, GPRRegister dst, GPRRegister src) { |
1631 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1664 arith_int<4>(Ty, dst, src); |
1632 if (Ty == IceType_i16) | |
1633 emitOperandSizeOverride(); | |
1634 if (isByteSizedType(Ty)) | |
1635 emitUint8(0x22); | |
1636 else | |
1637 emitUint8(0x23); | |
1638 emitRegisterOperand(dst, src); | |
1639 } | 1665 } |
1640 | 1666 |
1641 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) { | 1667 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Address &address) { |
1642 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1668 arith_int<4>(Ty, dst, address); |
1643 if (Ty == IceType_i16) | |
1644 emitOperandSizeOverride(); | |
1645 if (isByteSizedType(Ty)) | |
1646 emitUint8(0x22); | |
1647 else | |
1648 emitUint8(0x23); | |
1649 emitOperand(dst, address); | |
1650 } | 1669 } |
1651 | 1670 |
1652 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Immediate &imm) { | 1671 void AssemblerX8632::And(Type Ty, GPRRegister dst, const Immediate &imm) { |
1653 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1672 arith_int<4>(Ty, dst, imm); |
1654 if (isByteSizedType(Ty)) { | 1673 } |
1655 emitComplexI8(4, Operand(dst), imm); | 1674 |
1656 return; | 1675 void AssemblerX8632::And(Type Ty, const Address &address, GPRRegister reg) { |
1657 } | 1676 arith_int<4>(Ty, address, reg); |
1658 if (Ty == IceType_i16) | 1677 } |
1659 emitOperandSizeOverride(); | 1678 |
1660 emitComplex(Ty, 4, Operand(dst), imm); | 1679 void AssemblerX8632::And(Type Ty, const Address &address, |
| 1680 const Immediate &imm) { |
| 1681 arith_int<4>(Ty, address, imm); |
1661 } | 1682 } |
1662 | 1683 |
1663 void AssemblerX8632::Or(Type Ty, GPRRegister dst, GPRRegister src) { | 1684 void AssemblerX8632::Or(Type Ty, GPRRegister dst, GPRRegister src) { |
1664 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1685 arith_int<1>(Ty, dst, src); |
1665 if (Ty == IceType_i16) | |
1666 emitOperandSizeOverride(); | |
1667 if (isByteSizedType(Ty)) | |
1668 emitUint8(0x0A); | |
1669 else | |
1670 emitUint8(0x0B); | |
1671 emitRegisterOperand(dst, src); | |
1672 } | 1686 } |
1673 | 1687 |
1674 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) { | 1688 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Address &address) { |
1675 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1689 arith_int<1>(Ty, dst, address); |
1676 if (Ty == IceType_i16) | |
1677 emitOperandSizeOverride(); | |
1678 if (isByteSizedType(Ty)) | |
1679 emitUint8(0x0A); | |
1680 else | |
1681 emitUint8(0x0B); | |
1682 emitOperand(dst, address); | |
1683 } | 1690 } |
1684 | 1691 |
1685 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Immediate &imm) { | 1692 void AssemblerX8632::Or(Type Ty, GPRRegister dst, const Immediate &imm) { |
1686 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1693 arith_int<1>(Ty, dst, imm); |
1687 if (isByteSizedType(Ty)) { | 1694 } |
1688 emitComplexI8(1, Operand(dst), imm); | 1695 |
1689 return; | 1696 void AssemblerX8632::Or(Type Ty, const Address &address, GPRRegister reg) { |
1690 } | 1697 arith_int<1>(Ty, address, reg); |
1691 if (Ty == IceType_i16) | 1698 } |
1692 emitOperandSizeOverride(); | 1699 |
1693 emitComplex(Ty, 1, Operand(dst), imm); | 1700 void AssemblerX8632::Or(Type Ty, const Address &address, const Immediate &imm) { |
| 1701 arith_int<1>(Ty, address, imm); |
1694 } | 1702 } |
1695 | 1703 |
1696 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, GPRRegister src) { | 1704 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, GPRRegister src) { |
1697 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1705 arith_int<6>(Ty, dst, src); |
1698 if (Ty == IceType_i16) | |
1699 emitOperandSizeOverride(); | |
1700 if (isByteSizedType(Ty)) | |
1701 emitUint8(0x32); | |
1702 else | |
1703 emitUint8(0x33); | |
1704 emitRegisterOperand(dst, src); | |
1705 } | 1706 } |
1706 | 1707 |
1707 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) { | 1708 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Address &address) { |
1708 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1709 arith_int<6>(Ty, dst, address); |
1709 if (Ty == IceType_i16) | |
1710 emitOperandSizeOverride(); | |
1711 if (isByteSizedType(Ty)) | |
1712 emitUint8(0x32); | |
1713 else | |
1714 emitUint8(0x33); | |
1715 emitOperand(dst, address); | |
1716 } | 1710 } |
1717 | 1711 |
1718 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Immediate &imm) { | 1712 void AssemblerX8632::Xor(Type Ty, GPRRegister dst, const Immediate &imm) { |
1719 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1713 arith_int<6>(Ty, dst, imm); |
1720 if (isByteSizedType(Ty)) { | 1714 } |
1721 emitComplexI8(6, Operand(dst), imm); | 1715 |
1722 return; | 1716 void AssemblerX8632::Xor(Type Ty, const Address &address, GPRRegister reg) { |
1723 } | 1717 arith_int<6>(Ty, address, reg); |
1724 if (Ty == IceType_i16) | 1718 } |
1725 emitOperandSizeOverride(); | 1719 |
1726 emitComplex(Ty, 6, Operand(dst), imm); | 1720 void AssemblerX8632::Xor(Type Ty, const Address &address, |
| 1721 const Immediate &imm) { |
| 1722 arith_int<6>(Ty, address, imm); |
1727 } | 1723 } |
1728 | 1724 |
1729 void AssemblerX8632::add(Type Ty, GPRRegister dst, GPRRegister src) { | 1725 void AssemblerX8632::add(Type Ty, GPRRegister dst, GPRRegister src) { |
1730 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1726 arith_int<0>(Ty, dst, src); |
1731 if (Ty == IceType_i16) | |
1732 emitOperandSizeOverride(); | |
1733 if (isByteSizedArithType(Ty)) | |
1734 emitUint8(0x02); | |
1735 else | |
1736 emitUint8(0x03); | |
1737 emitRegisterOperand(dst, src); | |
1738 } | 1727 } |
1739 | 1728 |
1740 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) { | 1729 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Address &address) { |
1741 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1730 arith_int<0>(Ty, reg, address); |
1742 if (Ty == IceType_i16) | |
1743 emitOperandSizeOverride(); | |
1744 if (isByteSizedArithType(Ty)) | |
1745 emitUint8(0x02); | |
1746 else | |
1747 emitUint8(0x03); | |
1748 emitOperand(reg, address); | |
1749 } | 1731 } |
1750 | 1732 |
1751 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Immediate &imm) { | 1733 void AssemblerX8632::add(Type Ty, GPRRegister reg, const Immediate &imm) { |
1752 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1734 arith_int<0>(Ty, reg, imm); |
1753 if (isByteSizedArithType(Ty)) { | |
1754 emitComplexI8(0, Operand(reg), imm); | |
1755 return; | |
1756 } | |
1757 if (Ty == IceType_i16) | |
1758 emitOperandSizeOverride(); | |
1759 emitComplex(Ty, 0, Operand(reg), imm); | |
1760 } | 1735 } |
1761 | 1736 |
1762 void AssemblerX8632::add(Type Ty, const Address &address, GPRRegister reg) { | 1737 void AssemblerX8632::add(Type Ty, const Address &address, GPRRegister reg) { |
1763 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1738 arith_int<0>(Ty, address, reg); |
1764 if (Ty == IceType_i16) | |
1765 emitOperandSizeOverride(); | |
1766 if (isByteSizedArithType(Ty)) | |
1767 emitUint8(0x00); | |
1768 else | |
1769 emitUint8(0x01); | |
1770 emitOperand(reg, address); | |
1771 } | 1739 } |
1772 | 1740 |
1773 void AssemblerX8632::add(Type Ty, const Address &address, | 1741 void AssemblerX8632::add(Type Ty, const Address &address, |
1774 const Immediate &imm) { | 1742 const Immediate &imm) { |
1775 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1743 arith_int<0>(Ty, address, imm); |
1776 if (isByteSizedArithType(Ty)) { | |
1777 emitComplexI8(0, address, imm); | |
1778 return; | |
1779 } | |
1780 if (Ty == IceType_i16) | |
1781 emitOperandSizeOverride(); | |
1782 emitComplex(Ty, 0, address, imm); | |
1783 } | 1744 } |
1784 | 1745 |
1785 void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) { | 1746 void AssemblerX8632::adc(Type Ty, GPRRegister dst, GPRRegister src) { |
1786 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1747 arith_int<2>(Ty, dst, src); |
1787 if (Ty == IceType_i16) | |
1788 emitOperandSizeOverride(); | |
1789 if (isByteSizedArithType(Ty)) | |
1790 emitUint8(0x12); | |
1791 else | |
1792 emitUint8(0x13); | |
1793 emitRegisterOperand(dst, src); | |
1794 } | 1748 } |
1795 | 1749 |
1796 void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) { | 1750 void AssemblerX8632::adc(Type Ty, GPRRegister dst, const Address &address) { |
1797 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1751 arith_int<2>(Ty, dst, address); |
1798 if (Ty == IceType_i16) | |
1799 emitOperandSizeOverride(); | |
1800 if (isByteSizedArithType(Ty)) | |
1801 emitUint8(0x12); | |
1802 else | |
1803 emitUint8(0x13); | |
1804 emitOperand(dst, address); | |
1805 } | 1752 } |
1806 | 1753 |
1807 void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) { | 1754 void AssemblerX8632::adc(Type Ty, GPRRegister reg, const Immediate &imm) { |
1808 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1755 arith_int<2>(Ty, reg, imm); |
1809 if (isByteSizedArithType(Ty)) { | 1756 } |
1810 emitComplexI8(2, Operand(reg), imm); | 1757 |
1811 return; | 1758 void AssemblerX8632::adc(Type Ty, const Address &address, GPRRegister reg) { |
1812 } | 1759 arith_int<2>(Ty, address, reg); |
1813 if (Ty == IceType_i16) | 1760 } |
1814 emitOperandSizeOverride(); | 1761 |
1815 emitComplex(Ty, 2, Operand(reg), imm); | 1762 void AssemblerX8632::adc(Type Ty, const Address &address, |
| 1763 const Immediate &imm) { |
| 1764 arith_int<2>(Ty, address, imm); |
1816 } | 1765 } |
1817 | 1766 |
1818 void AssemblerX8632::sub(Type Ty, GPRRegister dst, GPRRegister src) { | 1767 void AssemblerX8632::sub(Type Ty, GPRRegister dst, GPRRegister src) { |
1819 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1768 arith_int<5>(Ty, dst, src); |
1820 if (Ty == IceType_i16) | |
1821 emitOperandSizeOverride(); | |
1822 if (isByteSizedArithType(Ty)) | |
1823 emitUint8(0x2A); | |
1824 else | |
1825 emitUint8(0x2B); | |
1826 emitRegisterOperand(dst, src); | |
1827 } | 1769 } |
1828 | 1770 |
1829 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) { | 1771 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Address &address) { |
1830 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1772 arith_int<5>(Ty, reg, address); |
1831 if (Ty == IceType_i16) | |
1832 emitOperandSizeOverride(); | |
1833 if (isByteSizedArithType(Ty)) | |
1834 emitUint8(0x2A); | |
1835 else | |
1836 emitUint8(0x2B); | |
1837 emitOperand(reg, address); | |
1838 } | 1773 } |
1839 | 1774 |
1840 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Immediate &imm) { | 1775 void AssemblerX8632::sub(Type Ty, GPRRegister reg, const Immediate &imm) { |
1841 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1776 arith_int<5>(Ty, reg, imm); |
1842 if (isByteSizedArithType(Ty)) { | 1777 } |
1843 emitComplexI8(5, Operand(reg), imm); | 1778 |
1844 return; | 1779 void AssemblerX8632::sub(Type Ty, const Address &address, GPRRegister reg) { |
1845 } | 1780 arith_int<5>(Ty, address, reg); |
1846 if (Ty == IceType_i16) | 1781 } |
1847 emitOperandSizeOverride(); | 1782 |
1848 emitComplex(Ty, 5, Operand(reg), imm); | 1783 void AssemblerX8632::sub(Type Ty, const Address &address, |
| 1784 const Immediate &imm) { |
| 1785 arith_int<5>(Ty, address, imm); |
1849 } | 1786 } |
1850 | 1787 |
1851 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, GPRRegister src) { | 1788 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, GPRRegister src) { |
1852 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1789 arith_int<3>(Ty, dst, src); |
1853 if (Ty == IceType_i16) | |
1854 emitOperandSizeOverride(); | |
1855 if (isByteSizedArithType(Ty)) | |
1856 emitUint8(0x1A); | |
1857 else | |
1858 emitUint8(0x1B); | |
1859 emitRegisterOperand(dst, src); | |
1860 } | 1790 } |
1861 | 1791 |
1862 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) { | 1792 void AssemblerX8632::sbb(Type Ty, GPRRegister dst, const Address &address) { |
1863 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1793 arith_int<3>(Ty, dst, address); |
1864 if (Ty == IceType_i16) | |
1865 emitOperandSizeOverride(); | |
1866 if (isByteSizedArithType(Ty)) | |
1867 emitUint8(0x1A); | |
1868 else | |
1869 emitUint8(0x1B); | |
1870 emitOperand(dst, address); | |
1871 } | 1794 } |
1872 | 1795 |
1873 void AssemblerX8632::sbb(Type Ty, GPRRegister reg, const Immediate &imm) { | 1796 void AssemblerX8632::sbb(Type Ty, GPRRegister reg, const Immediate &imm) { |
1874 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1797 arith_int<3>(Ty, reg, imm); |
1875 if (isByteSizedArithType(Ty)) { | 1798 } |
1876 emitComplexI8(3, Operand(reg), imm); | 1799 |
1877 return; | 1800 void AssemblerX8632::sbb(Type Ty, const Address &address, GPRRegister reg) { |
1878 } | 1801 arith_int<3>(Ty, address, reg); |
1879 if (Ty == IceType_i16) | 1802 } |
1880 emitOperandSizeOverride(); | 1803 |
1881 emitComplex(Ty, 3, Operand(reg), imm); | 1804 void AssemblerX8632::sbb(Type Ty, const Address &address, |
| 1805 const Immediate &imm) { |
| 1806 arith_int<3>(Ty, address, imm); |
1882 } | 1807 } |
1883 | 1808 |
1884 void AssemblerX8632::cbw() { | 1809 void AssemblerX8632::cbw() { |
1885 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1810 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
1886 emitOperandSizeOverride(); | 1811 emitOperandSizeOverride(); |
1887 emitUint8(0x98); | 1812 emitUint8(0x98); |
1888 } | 1813 } |
1889 | 1814 |
1890 void AssemblerX8632::cwd() { | 1815 void AssemblerX8632::cwd() { |
1891 AssemblerBuffer::EnsureCapacity ensured(&Buffer); | 1816 AssemblerBuffer::EnsureCapacity ensured(&Buffer); |
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2623 assert(shifter == RegX8632::Encoded_Reg_ecx); | 2548 assert(shifter == RegX8632::Encoded_Reg_ecx); |
2624 (void)shifter; | 2549 (void)shifter; |
2625 if (Ty == IceType_i16) | 2550 if (Ty == IceType_i16) |
2626 emitOperandSizeOverride(); | 2551 emitOperandSizeOverride(); |
2627 emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); | 2552 emitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); |
2628 emitOperand(rm, operand); | 2553 emitOperand(rm, operand); |
2629 } | 2554 } |
2630 | 2555 |
2631 } // end of namespace X8632 | 2556 } // end of namespace X8632 |
2632 } // end of namespace Ice | 2557 } // end of namespace Ice |
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