src/trusted/validator_arm/gen/arm32_decode_named_decoder.h - Issue 10949006: Change table data_processing_immediate to use the new notation. Also

Unified Diff: src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

Issue 10949006: Change table data_processing_immediate to use the new notation. Also (Closed) Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client/

Patch Set: Created 8 years, 3 months ago

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Index: src/trusted/validator_arm/gen/arm32_decode_named_decoder.h

===================================================================

--- src/trusted/validator_arm/gen/arm32_decode_named_decoder.h (revision 9791)

+++ src/trusted/validator_arm/gen/arm32_decode_named_decoder.h (working copy)

@@ -48,15 +48,15 @@

const NamedBinary2RegisterImmedShiftedTest_Cmp_Rule_36_A1_P82 Binary2RegisterImmedShiftedTest_Cmp_Rule_36_A1_P82_instance_;

const NamedBinary2RegisterImmedShiftedTest_Teq_Rule_228_A1_P450 Binary2RegisterImmedShiftedTest_Teq_Rule_228_A1_P450_instance_;

const NamedBinary2RegisterImmedShiftedTest_Tst_Rule_231_A1_P456 Binary2RegisterImmedShiftedTest_Tst_Rule_231_A1_P456_instance_;

- const NamedBinary2RegisterImmediateOp_Adc_Rule_6_A1_P14 Binary2RegisterImmediateOp_Adc_Rule_6_A1_P14_instance_;

- const NamedBinary2RegisterImmediateOp_Add_Rule_5_A1_P22 Binary2RegisterImmediateOp_Add_Rule_5_A1_P22_instance_;

- const NamedBinary2RegisterImmediateOp_And_Rule_11_A1_P34 Binary2RegisterImmediateOp_And_Rule_11_A1_P34_instance_;

- const NamedBinary2RegisterImmediateOp_Eor_Rule_44_A1_P94 Binary2RegisterImmediateOp_Eor_Rule_44_A1_P94_instance_;

- const NamedBinary2RegisterImmediateOp_Orr_Rule_113_A1_P228 Binary2RegisterImmediateOp_Orr_Rule_113_A1_P228_instance_;

- const NamedBinary2RegisterImmediateOp_Rsb_Rule_142_A1_P284 Binary2RegisterImmediateOp_Rsb_Rule_142_A1_P284_instance_;

- const NamedBinary2RegisterImmediateOp_Rsc_Rule_145_A1_P290 Binary2RegisterImmediateOp_Rsc_Rule_145_A1_P290_instance_;

- const NamedBinary2RegisterImmediateOp_Sbc_Rule_151_A1_P302 Binary2RegisterImmediateOp_Sbc_Rule_151_A1_P302_instance_;

- const NamedBinary2RegisterImmediateOp_Sub_Rule_212_A1_P420 Binary2RegisterImmediateOp_Sub_Rule_212_A1_P420_instance_;

+ const NamedBinary2RegisterImmediateOp_ADC_immediate_A1 Binary2RegisterImmediateOp_ADC_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_ADD_immediate_A1 Binary2RegisterImmediateOp_ADD_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_AND_immediate_A1 Binary2RegisterImmediateOp_AND_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_EOR_immediate_A1 Binary2RegisterImmediateOp_EOR_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_ORR_immediate_A1 Binary2RegisterImmediateOp_ORR_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_RSB_immediate_A1 Binary2RegisterImmediateOp_RSB_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_RSC_immediate_A1 Binary2RegisterImmediateOp_RSC_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_SBC_immediate_A1 Binary2RegisterImmediateOp_SBC_immediate_A1_instance_;

+ const NamedBinary2RegisterImmediateOp_SUB_immediate_A1 Binary2RegisterImmediateOp_SUB_immediate_A1_instance_;

const NamedBinary3RegisterImmedShiftedOp_Adc_Rule_2_A1_P16 Binary3RegisterImmedShiftedOp_Adc_Rule_2_A1_P16_instance_;

const NamedBinary3RegisterImmedShiftedOp_Add_Rule_6_A1_P24 Binary3RegisterImmedShiftedOp_Add_Rule_6_A1_P24_instance_;

const NamedBinary3RegisterImmedShiftedOp_And_Rule_7_A1_P36 Binary3RegisterImmedShiftedOp_And_Rule_7_A1_P36_instance_;

@@ -159,9 +159,9 @@

const NamedBinary4RegisterShiftedOp_RSC_register_shifted_register_A1 Binary4RegisterShiftedOp_RSC_register_shifted_register_A1_instance_;

const NamedBinary4RegisterShiftedOp_SBC_register_shifted_register_A1 Binary4RegisterShiftedOp_SBC_register_shifted_register_A1_instance_;

const NamedBinary4RegisterShiftedOp_SUB_register_shifted_register_A1 Binary4RegisterShiftedOp_SUB_register_shifted_register_A1_instance_;

- const NamedBinaryRegisterImmediateTest_Cmn_Rule_32_A1_P74 BinaryRegisterImmediateTest_Cmn_Rule_32_A1_P74_instance_;

- const NamedBinaryRegisterImmediateTest_Cmp_Rule_35_A1_P80 BinaryRegisterImmediateTest_Cmp_Rule_35_A1_P80_instance_;

- const NamedBinaryRegisterImmediateTest_Teq_Rule_227_A1_P448 BinaryRegisterImmediateTest_Teq_Rule_227_A1_P448_instance_;

+ const NamedBinaryRegisterImmediateTest_CMN_immediate_A1 BinaryRegisterImmediateTest_CMN_immediate_A1_instance_;

+ const NamedBinaryRegisterImmediateTest_CMP_immediate_A1 BinaryRegisterImmediateTest_CMP_immediate_A1_instance_;

+ const NamedBinaryRegisterImmediateTest_TEQ_immediate_A1 BinaryRegisterImmediateTest_TEQ_immediate_A1_instance_;

const NamedBranchImmediate24_B_Rule_16_A1_P44 BranchImmediate24_B_Rule_16_A1_P44_instance_;

const NamedBranchImmediate24_Bl_Blx_Rule_23_A1_P58 BranchImmediate24_Bl_Blx_Rule_23_A1_P58_instance_;

const NamedBranchToRegister_Blx_Rule_24_A1_P60 BranchToRegister_Blx_Rule_24_A1_P60_instance_;

@@ -223,8 +223,6 @@

const NamedForbiddenCondDecoder_Strt_Rule_A2 ForbiddenCondDecoder_Strt_Rule_A2_instance_;

const NamedForbiddenCondDecoder_Strtb_Rule_A1 ForbiddenCondDecoder_Strtb_Rule_A1_instance_;

const NamedForbiddenCondDecoder_Strtb_Rule_A2 ForbiddenCondDecoder_Strtb_Rule_A2_instance_;

- const NamedForbiddenCondDecoder_Subs_Pc_Lr_and_related_instructions_Rule_A1a ForbiddenCondDecoder_Subs_Pc_Lr_and_related_instructions_Rule_A1a_instance_;

- const NamedForbiddenCondDecoder_Subs_Pc_Lr_and_related_instructions_Rule_A1b ForbiddenCondDecoder_Subs_Pc_Lr_and_related_instructions_Rule_A1b_instance_;

const NamedForbiddenCondDecoder_Svc_Rule_A1 ForbiddenCondDecoder_Svc_Rule_A1_instance_;

const NamedForbiddenCondDecoder_Wfe_Rule_411_A1_P808 ForbiddenCondDecoder_Wfe_Rule_411_A1_P808_instance_;

const NamedForbiddenCondDecoder_Wfi_Rule_412_A1_P810 ForbiddenCondDecoder_Wfi_Rule_412_A1_P810_instance_;

@@ -276,8 +274,8 @@

const NamedLoadVectorRegisterList_Vldm_Rule_318_A1_A2_P626 LoadVectorRegisterList_Vldm_Rule_318_A1_A2_P626_instance_;

const NamedLoadVectorRegisterList_Vldm_Rule_319_A1_A2_P626 LoadVectorRegisterList_Vldm_Rule_319_A1_A2_P626_instance_;

const NamedLoadVectorRegisterList_Vpop_Rule_354_A1_A2_P694 LoadVectorRegisterList_Vpop_Rule_354_A1_A2_P694_instance_;

- const NamedMaskedBinary2RegisterImmediateOp_Bic_Rule_19_A1_P50 MaskedBinary2RegisterImmediateOp_Bic_Rule_19_A1_P50_instance_;

- const NamedMaskedBinaryRegisterImmediateTest_Tst_Rule_230_A1_P454 MaskedBinaryRegisterImmediateTest_Tst_Rule_230_A1_P454_instance_;

+ const NamedMaskedBinary2RegisterImmediateOp_BIC_immediate_A1 MaskedBinary2RegisterImmediateOp_BIC_immediate_A1_instance_;

+ const NamedMaskedBinaryRegisterImmediateTest_TST_immediate_A1 MaskedBinaryRegisterImmediateTest_TST_immediate_A1_instance_;

const NamedMoveDoubleVfpRegisterOp_Vmov_one_D_Rule_A1 MoveDoubleVfpRegisterOp_Vmov_one_D_Rule_A1_instance_;

const NamedMoveDoubleVfpRegisterOp_Vmov_two_S_Rule_A1 MoveDoubleVfpRegisterOp_Vmov_two_S_Rule_A1_instance_;

const NamedMoveImmediate12ToApsr_Msr_Rule_103_A1_P208 MoveImmediate12ToApsr_Msr_Rule_103_A1_P208_instance_;

@@ -315,12 +313,12 @@

const NamedStoreVectorRegisterList_Vpush_355_A1_A2_P696 StoreVectorRegisterList_Vpush_355_A1_A2_P696_instance_;

const NamedStoreVectorRegisterList_Vstm_Rule_399_A1_A2_P784 StoreVectorRegisterList_Vstm_Rule_399_A1_A2_P784_instance_;

const NamedUnary1RegisterBitRangeMsbGeLsb_Bfc_17_A1_P46 Unary1RegisterBitRangeMsbGeLsb_Bfc_17_A1_P46_instance_;

- const NamedUnary1RegisterImmediateOp_Adr_Rule_10_A1_P32 Unary1RegisterImmediateOp_Adr_Rule_10_A1_P32_instance_;

- const NamedUnary1RegisterImmediateOp_Adr_Rule_10_A2_P32 Unary1RegisterImmediateOp_Adr_Rule_10_A2_P32_instance_;

- const NamedUnary1RegisterImmediateOp_Mov_Rule_96_A1_P194 Unary1RegisterImmediateOp_Mov_Rule_96_A1_P194_instance_;

+ const NamedUnary1RegisterImmediateOp_ADR_A1 Unary1RegisterImmediateOp_ADR_A1_instance_;

+ const NamedUnary1RegisterImmediateOp_ADR_A2 Unary1RegisterImmediateOp_ADR_A2_instance_;

+ const NamedUnary1RegisterImmediateOp_MOV_immediate_A1 Unary1RegisterImmediateOp_MOV_immediate_A1_instance_;

+ const NamedUnary1RegisterImmediateOp_MVN_immediate_A1 Unary1RegisterImmediateOp_MVN_immediate_A1_instance_;

const NamedUnary1RegisterImmediateOp_Mov_Rule_96_A2_P194 Unary1RegisterImmediateOp_Mov_Rule_96_A2_P194_instance_;

const NamedUnary1RegisterImmediateOp_Mov_Rule_99_A1_P200 Unary1RegisterImmediateOp_Mov_Rule_99_A1_P200_instance_;

- const NamedUnary1RegisterImmediateOp_Mvn_Rule_106_A1_P214 Unary1RegisterImmediateOp_Mvn_Rule_106_A1_P214_instance_;

const NamedUnary1RegisterSet_Mrs_Rule_102_A1_P206_Or_B6_10 Unary1RegisterSet_Mrs_Rule_102_A1_P206_Or_B6_10_instance_;

const NamedUnary1RegisterUse_Msr_Rule_104_A1_P210 Unary1RegisterUse_Msr_Rule_104_A1_P210_instance_;

const NamedUnary2RegisterImmedShiftedOp_Asr_Rule_14_A1_P40 Unary2RegisterImmedShiftedOp_Asr_Rule_14_A1_P40_instance_;

@@ -358,37 +356,37 @@

const NamedBreakpoint_Bkpt_Rule_22_A1_P56 Breakpoint_Bkpt_Rule_22_A1_P56_instance_;

const NamedBxBlx_Blx_Rule_24_A1_P60 BxBlx_Blx_Rule_24_A1_P60_instance_;

const NamedBxBlx_Bx_Rule_25_A1_P62 BxBlx_Bx_Rule_25_A1_P62_instance_;

+ const NamedDefs12To15_ADC_immediate_A1 Defs12To15_ADC_immediate_A1_instance_;

+ const NamedDefs12To15_ADD_immediate_A1 Defs12To15_ADD_immediate_A1_instance_;

+ const NamedDefs12To15_ADR_A1 Defs12To15_ADR_A1_instance_;

+ const NamedDefs12To15_ADR_A2 Defs12To15_ADR_A2_instance_;

+ const NamedDefs12To15_AND_immediate_A1 Defs12To15_AND_immediate_A1_instance_;

const NamedDefs12To15_Adc_Rule_2_A1_P16 Defs12To15_Adc_Rule_2_A1_P16_instance_;

- const NamedDefs12To15_Adc_Rule_6_A1_P14 Defs12To15_Adc_Rule_6_A1_P14_instance_;

- const NamedDefs12To15_Add_Rule_5_A1_P22 Defs12To15_Add_Rule_5_A1_P22_instance_;

const NamedDefs12To15_Add_Rule_6_A1_P24 Defs12To15_Add_Rule_6_A1_P24_instance_;

- const NamedDefs12To15_Adr_Rule_10_A1_P32 Defs12To15_Adr_Rule_10_A1_P32_instance_;

- const NamedDefs12To15_Adr_Rule_10_A2_P32 Defs12To15_Adr_Rule_10_A2_P32_instance_;

- const NamedDefs12To15_And_Rule_11_A1_P34 Defs12To15_And_Rule_11_A1_P34_instance_;

const NamedDefs12To15_And_Rule_7_A1_P36 Defs12To15_And_Rule_7_A1_P36_instance_;

const NamedDefs12To15_Asr_Rule_14_A1_P40 Defs12To15_Asr_Rule_14_A1_P40_instance_;

const NamedDefs12To15_Bic_Rule_20_A1_P52 Defs12To15_Bic_Rule_20_A1_P52_instance_;

- const NamedDefs12To15_Eor_Rule_44_A1_P94 Defs12To15_Eor_Rule_44_A1_P94_instance_;

+ const NamedDefs12To15_EOR_immediate_A1 Defs12To15_EOR_immediate_A1_instance_;

const NamedDefs12To15_Eor_Rule_45_A1_P96 Defs12To15_Eor_Rule_45_A1_P96_instance_;

const NamedDefs12To15_Lsl_Rule_88_A1_P178 Defs12To15_Lsl_Rule_88_A1_P178_instance_;

const NamedDefs12To15_Lsr_Rule_90_A1_P182 Defs12To15_Lsr_Rule_90_A1_P182_instance_;

- const NamedDefs12To15_Mov_Rule_96_A1_P194 Defs12To15_Mov_Rule_96_A1_P194_instance_;

+ const NamedDefs12To15_MOV_immediate_A1 Defs12To15_MOV_immediate_A1_instance_;

+ const NamedDefs12To15_MVN_immediate_A1 Defs12To15_MVN_immediate_A1_instance_;

const NamedDefs12To15_Mov_Rule_96_A2_P194 Defs12To15_Mov_Rule_96_A2_P194_instance_;

const NamedDefs12To15_Mov_Rule_97_A1_P196 Defs12To15_Mov_Rule_97_A1_P196_instance_;

const NamedDefs12To15_Mov_Rule_99_A1_P200 Defs12To15_Mov_Rule_99_A1_P200_instance_;

- const NamedDefs12To15_Mvn_Rule_106_A1_P214 Defs12To15_Mvn_Rule_106_A1_P214_instance_;

const NamedDefs12To15_Mvn_Rule_107_A1_P216 Defs12To15_Mvn_Rule_107_A1_P216_instance_;

- const NamedDefs12To15_Orr_Rule_113_A1_P228 Defs12To15_Orr_Rule_113_A1_P228_instance_;

+ const NamedDefs12To15_ORR_immediate_A1 Defs12To15_ORR_immediate_A1_instance_;

const NamedDefs12To15_Orr_Rule_114_A1_P230 Defs12To15_Orr_Rule_114_A1_P230_instance_;

+ const NamedDefs12To15_RSB_immediate_A1 Defs12To15_RSB_immediate_A1_instance_;

+ const NamedDefs12To15_RSC_immediate_A1 Defs12To15_RSC_immediate_A1_instance_;

const NamedDefs12To15_Ror_Rule_139_A1_P278 Defs12To15_Ror_Rule_139_A1_P278_instance_;

const NamedDefs12To15_Rrx_Rule_141_A1_P282 Defs12To15_Rrx_Rule_141_A1_P282_instance_;

- const NamedDefs12To15_Rsb_Rule_142_A1_P284 Defs12To15_Rsb_Rule_142_A1_P284_instance_;

const NamedDefs12To15_Rsb_Rule_143_P286 Defs12To15_Rsb_Rule_143_P286_instance_;

- const NamedDefs12To15_Rsc_Rule_145_A1_P290 Defs12To15_Rsc_Rule_145_A1_P290_instance_;

const NamedDefs12To15_Rsc_Rule_146_A1_P292 Defs12To15_Rsc_Rule_146_A1_P292_instance_;

- const NamedDefs12To15_Sbc_Rule_151_A1_P302 Defs12To15_Sbc_Rule_151_A1_P302_instance_;

+ const NamedDefs12To15_SBC_immediate_A1 Defs12To15_SBC_immediate_A1_instance_;

+ const NamedDefs12To15_SUB_immediate_A1 Defs12To15_SUB_immediate_A1_instance_;

const NamedDefs12To15_Sbc_Rule_152_A1_P304 Defs12To15_Sbc_Rule_152_A1_P304_instance_;

- const NamedDefs12To15_Sub_Rule_212_A1_P420 Defs12To15_Sub_Rule_212_A1_P420_instance_;

const NamedDefs12To15_Sub_Rule_213_A1_P422 Defs12To15_Sub_Rule_213_A1_P422_instance_;

const NamedDefs12To15CondsDontCareMsbGeLsb_Bfi_Rule_18_A1_P48 Defs12To15CondsDontCareMsbGeLsb_Bfi_Rule_18_A1_P48_instance_;

const NamedDefs12To15CondsDontCareRdRnNotPc_Rbit_Rule_134_A1_P270 Defs12To15CondsDontCareRdRnNotPc_Rbit_Rule_134_A1_P270_instance_;

@@ -497,9 +495,9 @@

const NamedDefs16To19CondsDontCareRdRmRnNotPc_Smusd_Rule_181_P360 Defs16To19CondsDontCareRdRmRnNotPc_Smusd_Rule_181_P360_instance_;

const NamedDefs16To19CondsDontCareRdRmRnNotPc_Udiv_Rule_A1 Defs16To19CondsDontCareRdRmRnNotPc_Udiv_Rule_A1_instance_;

const NamedDefs16To19CondsDontCareRdRmRnNotPc_Usad8_Rule_253_A1_P500 Defs16To19CondsDontCareRdRmRnNotPc_Usad8_Rule_253_A1_P500_instance_;

- const NamedDontCareInst_Cmn_Rule_32_A1_P74 DontCareInst_Cmn_Rule_32_A1_P74_instance_;

+ const NamedDontCareInst_CMN_immediate_A1 DontCareInst_CMN_immediate_A1_instance_;

+ const NamedDontCareInst_CMP_immediate_A1 DontCareInst_CMP_immediate_A1_instance_;

const NamedDontCareInst_Cmn_Rule_33_A1_P76 DontCareInst_Cmn_Rule_33_A1_P76_instance_;

- const NamedDontCareInst_Cmp_Rule_35_A1_P80 DontCareInst_Cmp_Rule_35_A1_P80_instance_;

const NamedDontCareInst_Cmp_Rule_36_A1_P82 DontCareInst_Cmp_Rule_36_A1_P82_instance_;

const NamedDontCareInst_Msr_Rule_103_A1_P208 DontCareInst_Msr_Rule_103_A1_P208_instance_;

const NamedDontCareInst_Nop_Rule_110_A1_P222 DontCareInst_Nop_Rule_110_A1_P222_instance_;

@@ -507,7 +505,7 @@

const NamedDontCareInst_Pld_Rule_118_A1_P238 DontCareInst_Pld_Rule_118_A1_P238_instance_;

const NamedDontCareInst_Pldw_Rule_117_A1_P236 DontCareInst_Pldw_Rule_117_A1_P236_instance_;

const NamedDontCareInst_Pli_Rule_120_A1_P242 DontCareInst_Pli_Rule_120_A1_P242_instance_;

- const NamedDontCareInst_Teq_Rule_227_A1_P448 DontCareInst_Teq_Rule_227_A1_P448_instance_;

+ const NamedDontCareInst_TEQ_immediate_A1 DontCareInst_TEQ_immediate_A1_instance_;

const NamedDontCareInst_Teq_Rule_228_A1_P450 DontCareInst_Teq_Rule_228_A1_P450_instance_;

const NamedDontCareInst_Tst_Rule_231_A1_P456 DontCareInst_Tst_Rule_231_A1_P456_instance_;

const NamedDontCareInst_Yield_Rule_413_A1_P812 DontCareInst_Yield_Rule_413_A1_P812_instance_;

@@ -559,8 +557,6 @@

const NamedForbidden_Strt_Rule_A2 Forbidden_Strt_Rule_A2_instance_;

const NamedForbidden_Strtb_Rule_A1 Forbidden_Strtb_Rule_A1_instance_;

const NamedForbidden_Strtb_Rule_A2 Forbidden_Strtb_Rule_A2_instance_;

- const NamedForbidden_Subs_Pc_Lr_and_related_instructions_Rule_A1a Forbidden_Subs_Pc_Lr_and_related_instructions_Rule_A1a_instance_;

- const NamedForbidden_Subs_Pc_Lr_and_related_instructions_Rule_A1b Forbidden_Subs_Pc_Lr_and_related_instructions_Rule_A1b_instance_;

const NamedForbidden_Svc_Rule_A1 Forbidden_Svc_Rule_A1_instance_;

const NamedForbidden_Unallocated_hints Forbidden_Unallocated_hints_instance_;

const NamedForbidden_Wfe_Rule_411_A1_P808 Forbidden_Wfe_Rule_411_A1_P808_instance_;

@@ -593,7 +589,7 @@

const NamedLoadMultiple_Ldmdb_Ldmea_Rule_55_A1_P114 LoadMultiple_Ldmdb_Ldmea_Rule_55_A1_P114_instance_;

const NamedLoadMultiple_Ldmib_Ldmed_Rule_56_A1_P116 LoadMultiple_Ldmib_Ldmed_Rule_56_A1_P116_instance_;

const NamedLoadMultiple_Pop_Rule_A1 LoadMultiple_Pop_Rule_A1_instance_;

- const NamedMaskAddress_Bic_Rule_19_A1_P50 MaskAddress_Bic_Rule_19_A1_P50_instance_;

+ const NamedMaskAddress_BIC_immediate_A1 MaskAddress_BIC_immediate_A1_instance_;

const NamedStoreBasedImmedMemory_Str_Rule_194_A1_P384 StoreBasedImmedMemory_Str_Rule_194_A1_P384_instance_;

const NamedStoreBasedImmedMemory_Strb_Rule_197_A1_P390 StoreBasedImmedMemory_Strb_Rule_197_A1_P390_instance_;

const NamedStoreBasedImmedMemory_Strh_Rule_207_A1_P410 StoreBasedImmedMemory_Strh_Rule_207_A1_P410_instance_;

@@ -606,7 +602,7 @@

const NamedStoreBasedOffsetMemory_Strb_Rule_198_A1_P392 StoreBasedOffsetMemory_Strb_Rule_198_A1_P392_instance_;

const NamedStoreBasedOffsetMemory_Strh_Rule_208_A1_P412 StoreBasedOffsetMemory_Strh_Rule_208_A1_P412_instance_;

const NamedStoreBasedOffsetMemoryDouble_Strd_Rule_201_A1_P398 StoreBasedOffsetMemoryDouble_Strd_Rule_201_A1_P398_instance_;

- const NamedTestIfAddressMasked_Tst_Rule_230_A1_P454 TestIfAddressMasked_Tst_Rule_230_A1_P454_instance_;

+ const NamedTestIfAddressMasked_TST_immediate_A1 TestIfAddressMasked_TST_immediate_A1_instance_;

const NamedUndefined_Undefined_A5_2_5_0101 Undefined_Undefined_A5_2_5_0101_instance_;

const NamedUndefined_Undefined_A5_2_5_0111 Undefined_Undefined_A5_2_5_0111_instance_;

const NamedUndefined_Undefined_A5_6 Undefined_Undefined_A5_6_instance_;

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