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Issue 1044423006: WIP: Add ARM32 add/ldr/str instructions and operand types. (Closed)

Created:
5 years, 8 months ago by jvoung (off chromium)
Modified:
5 years, 7 months ago
Reviewers:
CC:
native-client-reviews_googlegroups.com
Base URL:
https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Target Ref:
refs/heads/master
Visibility:
Public.

Description

WIP: Add ARM32 add/ldr/str instructions and operand types. Adds the memory operand / address type. Also adds the "flexible second operand". Still need to tweak "legalize" to do the right amount of ldr/str and to take advantage of the flexiblility. REPLACED by other CLs. BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076

Patch Set 1 #

Patch Set 2 : a bit more stuff #

Patch Set 3 : more stuff #

Patch Set 4 : copy a bit of legalization stuff #

Patch Set 5 : checkpoint #

Patch Set 6 : more stuff #

Patch Set 7 : split the flex operand up #

Patch Set 8 : checkpoint -- need to fix legalize for flex... #

Patch Set 9 : ldr/str widths and print shift ops #

Patch Set 10 : more printing #

Patch Set 11 : add a couple more mov types for legalization #

Patch Set 12 : suppress enough checks to print out add and return #

Patch Set 13 : bunch more stuff for lowerArguments #

Patch Set 14 : add int-arg.ll #

Patch Set 15 : rebase #

Patch Set 16 : more random cleanup #

Patch Set 17 : fix movt to be two-address and add post-lower #

Patch Set 18 : toggle the supported tests #

Patch Set 19 : more stuff #

Patch Set 20 : lower16, upper16 printing #

Patch Set 21 : conditionalize emit #

Patch Set 22 : add test case for rotation #

Patch Set 23 : rebase #

Unified diffs Side-by-side diffs Delta from patch set Stats (+99 lines, -15 lines) Patch
M src/IceInstARM32.h View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 3 chunks +60 lines, -1 line 0 comments Download
M src/IceInstARM32.cpp View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 3 chunks +25 lines, -1 line 0 comments Download
M src/IceInstARM32.def View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 chunk +7 lines, -7 lines 0 comments Download
M src/IceTargetLoweringARM32.h View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 chunk +3 lines, -0 lines 0 comments Download
M src/IceTargetLoweringARM32.cpp View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 2 chunks +3 lines, -6 lines 0 comments Download
M tests_lit/llvm2ice_tests/arith-opt.ll View 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 chunk +1 line, -0 lines 0 comments Download

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