| OLD | NEW |
| 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// | 1 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 // | 9 // |
| 10 // This file implements the TargetLoweringARM32 class, which consists almost | 10 // This file implements the TargetLoweringARM32 class, which consists almost |
| (...skipping 524 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 535 Variable *Dest = Inst->getDest(); | 535 Variable *Dest = Inst->getDest(); |
| 536 // TODO(jvoung): Should be able to flip Src0 and Src1 if it is easier | 536 // TODO(jvoung): Should be able to flip Src0 and Src1 if it is easier |
| 537 // to legalize Src0 to flex or Src1 to flex and there is a reversible | 537 // to legalize Src0 to flex or Src1 to flex and there is a reversible |
| 538 // instruction. E.g., reverse subtract with immediate, register vs | 538 // instruction. E.g., reverse subtract with immediate, register vs |
| 539 // register, immediate. | 539 // register, immediate. |
| 540 // Or it may be the case that the operands aren't swapped, but the | 540 // Or it may be the case that the operands aren't swapped, but the |
| 541 // bits can be flipped and a different operation applied. | 541 // bits can be flipped and a different operation applied. |
| 542 // E.g., use BIC (bit clear) instead of AND for some masks. | 542 // E.g., use BIC (bit clear) instead of AND for some masks. |
| 543 Variable *Src0 = legalizeToVar(Inst->getSrc(0)); | 543 Variable *Src0 = legalizeToVar(Inst->getSrc(0)); |
| 544 Operand *Src1 = legalize(Inst->getSrc(1), Legal_Reg | Legal_Flex); | 544 Operand *Src1 = legalize(Inst->getSrc(1), Legal_Reg | Legal_Flex); |
| 545 (void)Src0; | |
| 546 (void)Src1; | |
| 547 if (Dest->getType() == IceType_i64) { | 545 if (Dest->getType() == IceType_i64) { |
| 548 UnimplementedError(Func->getContext()->getFlags()); | 546 UnimplementedError(Func->getContext()->getFlags()); |
| 549 } else if (isVectorType(Dest->getType())) { | 547 } else if (isVectorType(Dest->getType())) { |
| 550 UnimplementedError(Func->getContext()->getFlags()); | 548 UnimplementedError(Func->getContext()->getFlags()); |
| 551 } else { // Dest->getType() is non-i64 scalar | 549 } else { // Dest->getType() is non-i64 scalar |
| 552 switch (Inst->getOp()) { | 550 switch (Inst->getOp()) { |
| 553 case InstArithmetic::_num: | 551 case InstArithmetic::_num: |
| 554 llvm_unreachable("Unknown arithmetic operator"); | 552 llvm_unreachable("Unknown arithmetic operator"); |
| 555 break; | 553 break; |
| 556 case InstArithmetic::Add: { | 554 case InstArithmetic::Add: { |
| 557 UnimplementedError(Func->getContext()->getFlags()); | 555 Variable *T = makeReg(Dest->getType()); |
| 558 // Variable *T = makeReg(Dest->getType()); | 556 _add(T, Src0, Src1); |
| 559 // _add(T, Src0, Src1); | 557 _mov(Dest, T); |
| 560 // _mov(Dest, T); | |
| 561 } break; | 558 } break; |
| 562 case InstArithmetic::And: | 559 case InstArithmetic::And: |
| 563 UnimplementedError(Func->getContext()->getFlags()); | 560 UnimplementedError(Func->getContext()->getFlags()); |
| 564 break; | 561 break; |
| 565 case InstArithmetic::Or: | 562 case InstArithmetic::Or: |
| 566 UnimplementedError(Func->getContext()->getFlags()); | 563 UnimplementedError(Func->getContext()->getFlags()); |
| 567 break; | 564 break; |
| 568 case InstArithmetic::Xor: | 565 case InstArithmetic::Xor: |
| 569 UnimplementedError(Func->getContext()->getFlags()); | 566 UnimplementedError(Func->getContext()->getFlags()); |
| 570 break; | 567 break; |
| (...skipping 626 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1197 } | 1194 } |
| 1198 } | 1195 } |
| 1199 | 1196 |
| 1200 void TargetDataARM32::lowerConstants() const { | 1197 void TargetDataARM32::lowerConstants() const { |
| 1201 if (Ctx->getFlags().getDisableTranslation()) | 1198 if (Ctx->getFlags().getDisableTranslation()) |
| 1202 return; | 1199 return; |
| 1203 UnimplementedError(Ctx->getFlags()); | 1200 UnimplementedError(Ctx->getFlags()); |
| 1204 } | 1201 } |
| 1205 | 1202 |
| 1206 } // end of namespace Ice | 1203 } // end of namespace Ice |
| OLD | NEW |