Index: src/IceInstARM32.cpp |
diff --git a/src/IceInstARM32.cpp b/src/IceInstARM32.cpp |
index 6ac169862b063dcb3149c765a8ef9c0977d7f182..c4b490fb99122f668a6e0960f0af35f4a0ea8ba8 100644 |
--- a/src/IceInstARM32.cpp |
+++ b/src/IceInstARM32.cpp |
@@ -67,6 +67,22 @@ void emitTwoAddr(const char *Opcode, const Inst *Inst, const Cfg *Func) { |
Src1->emit(Func); |
} |
+void emitBinop(const char *Opcode, const Inst *Inst, const Cfg *Func) { |
+ if (!ALLOW_DUMP) |
+ return; |
+ Ostream &Str = Func->getContext()->getStrEmit(); |
+ assert(Inst->getSrcSize() == 2); |
+ Variable *Dest = Inst->getDest(); |
+ Operand *Src0 = Inst->getSrc(0); |
+ Operand *Src1 = Inst->getSrc(1); |
+ Str << "\t" << Opcode << "\t"; |
+ Dest->emit(Func); |
+ Str << ", "; |
+ Src0->emit(Func); |
+ Str << ", "; |
+ Src1->emit(Func); |
+} |
+ |
OperandARM32Mem::OperandARM32Mem(Cfg * /* Func */, Type Ty, Variable *Base, |
ConstantInteger32 *ImmOffset, AddrMode Mode) |
: OperandARM32(kMem, Ty), Base(Base), ImmOffset(ImmOffset), Index(nullptr), |
@@ -162,6 +178,14 @@ template <> const char *InstARM32Movw::Opcode = "movw"; |
template <> const char *InstARM32Mvn::Opcode = "mvn"; |
// Mov-like ops |
template <> const char *InstARM32Mov::Opcode = "mov"; |
+// Binary ops |
+template <> const char *InstARM32Adc::Opcode = "adc"; |
+template <> const char *InstARM32Add::Opcode = "add"; |
+template <> const char *InstARM32And::Opcode = "and"; |
+template <> const char *InstARM32Rsb::Opcode = "rsb"; |
+template <> const char *InstARM32Rsc::Opcode = "rsc"; |
+template <> const char *InstARM32Sbc::Opcode = "sbc"; |
+template <> const char *InstARM32Sub::Opcode = "sub"; |
void InstARM32::dump(const Cfg *Func) const { |
if (!ALLOW_DUMP) |
@@ -274,7 +298,7 @@ void InstARM32Ret::emit(const Cfg *Func) const { |
assert(LR->hasReg()); |
assert(LR->getRegNum() == RegARM32::Reg_lr); |
Ostream &Str = Func->getContext()->getStrEmit(); |
- Str << "\tbx\t"; |
+ Str << "\t" << "bx" << "\t"; |
LR->emit(Func); |
} |