Issue 2122021: Make ldrd and strd instructions take two register arguments

Issue 2122021: Make ldrd and strd instructions take two register arguments (Closed)

Created:
10 years, 7 months ago by Søren Thygesen Gjesse

Modified:
9 years, 7 months ago

Reviewers:
Erik Corry, rodolph

CC:
v8-dev

Base URL:
http://v8.googlecode.com/svn/branches/bleeding_edge/

Visibility:
Public.

Description

Make ldrd and strd instructions take two register arguments Committed: http://code.google.com/p/v8/source/detail?r=4724

Patch Set 2 : '' #

Created: 10 years, 7 months ago

Download [raw] [tar.bz2]

	Unified diffs	Side-by-side diffs	Delta from patch set	Stats (+41 lines, -31 lines)			Patch
M	src/arm/assembler-arm.h	View	1	1 chunk	+6 lines, -2 lines	0 comments	Download
M	src/arm/assembler-arm.cc	View	1	1 chunk	+25 lines, -19 lines	0 comments	Download
M	src/arm/codegen-arm.cc	View	1	8 chunks	+9 lines, -9 lines	0 comments	Download
M	src/arm/full-codegen-arm.cc	View	1	1 chunk	+1 line, -1 line	0 comments	Download

Messages

Total messages: 4 (0 generated)

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Erik Corry

LGTM. Obviously has to be tested both with and without ARMv7. http://codereview.chromium.org/2122021/diff/1/2 File src/arm/assembler-arm.cc (right): ...

10 years, 7 months ago (2010-05-25 18:34:25 UTC) #2

rodolph

http://codereview.chromium.org/2122021/diff/1/2 File src/arm/assembler-arm.cc (right): http://codereview.chromium.org/2122021/diff/1/2#newcode1370 src/arm/assembler-arm.cc:1370: ASSERT(dst1.code() == dst2.code() + 1); and dst1 cannot be ...

10 years, 7 months ago (2010-05-25 18:58:25 UTC) #3

Søren Thygesen Gjesse

10 years, 7 months ago (2010-05-26 08:28:15 UTC) #4

Running all the tests in release and debug mode on the simulator both with and
without ARMv7 support enabled before committing.

http://codereview.chromium.org/2122021/diff/1/2
File src/arm/assembler-arm.cc (right):

http://codereview.chromium.org/2122021/diff/1/2#newcode1370
src/arm/assembler-arm.cc:1370: ASSERT(dst1.code() == dst2.code() + 1);
On 2010/05/25 18:34:25, Erik Corry wrote:
> I think also that dst1 has to be even-numbered?

Thats right (I checked the reference manual). Added assert.

http://codereview.chromium.org/2122021/diff/1/2#newcode1370
src/arm/assembler-arm.cc:1370: ASSERT(dst1.code() == dst2.code() + 1);
On 2010/05/25 18:58:26, rodolph wrote:
> and dst1 cannot be r14 either.

Added assert for lr as well.

http://codereview.chromium.org/2122021/diff/1/2#newcode1392
src/arm/assembler-arm.cc:1392: ASSERT(src1.code() == src2.code() + 1);
On 2010/05/25 18:34:25, Erik Corry wrote:
> Does this assert really pass?

Of cause it did not. Fixed.

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