| Index: lib/Target/X86/X86SelectionDAGInfo.cpp
|
| diff --git a/lib/Target/X86/X86SelectionDAGInfo.cpp b/lib/Target/X86/X86SelectionDAGInfo.cpp
|
| index 821044f4bccd724bae556109a6b6dfc06360addc..972c66e8cda82244770c1c59e067cb9bb61d4690 100644
|
| --- a/lib/Target/X86/X86SelectionDAGInfo.cpp
|
| +++ b/lib/Target/X86/X86SelectionDAGInfo.cpp
|
| @@ -59,6 +59,13 @@ X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
|
| ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
|
| const X86Subtarget &Subtarget = DAG.getTarget().getSubtarget<X86Subtarget>();
|
|
|
| + // @LOCALMOD-BEGIN
|
| + if (Subtarget.isTargetNaCl()) {
|
| + // TODO: Can we allow this optimization for Native Client?
|
| + // At the very least, pointer size needs to be fixed below.
|
| + return SDValue();
|
| + }
|
| + // @LOCALMOD-END
|
| #ifndef NDEBUG
|
| // If the base register might conflict with our physical registers, bail out.
|
| unsigned ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI,
|
| @@ -216,6 +223,13 @@ X86SelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
|
| if (!AlwaysInline && SizeVal > Subtarget.getMaxInlineSizeThreshold())
|
| return SDValue();
|
|
|
| + // @LOCALMOD-BEGIN
|
| + if (Subtarget.isTargetNaCl()) {
|
| + // TODO(pdox): Allow use of the NaCl pseudo-instruction for REP MOV
|
| + return SDValue();
|
| + }
|
| + // @LOCALMOD-END
|
| +
|
| /// If not DWORD aligned, it is more efficient to call the library. However
|
| /// if calling the library is not allowed (AlwaysInline), then soldier on as
|
| /// the code generated here is better than the long load-store sequence we
|
|
|