Rebased PNaCl localmods in LLVM to 223109

lib/Target/X86/X86RegisterInfo.td

Index: lib/Target/X86/X86RegisterInfo.td
diff --git a/lib/Target/X86/X86RegisterInfo.td b/lib/Target/X86/X86RegisterInfo.td
index 311a7178149aaf25ab30fce6b0e37361ecc04da9..454e28d1abaf01ff8b3d241154f1787ae078b54e 100644
--- a/lib/Target/X86/X86RegisterInfo.td
+++ b/lib/Target/X86/X86RegisterInfo.td
@@ -262,6 +262,8 @@ def ES : X86Reg<"es", 0>;
 def FS : X86Reg<"fs", 4>;
 def GS : X86Reg<"gs", 5>;
 
+def PSEUDO_NACL_SEG : X86Reg<"nacl", 6>; // @LOCALMOD
+
 // Debug registers
 def DR0 : X86Reg<"dr0", 0>;
 def DR1 : X86Reg<"dr1", 1>;
@@ -339,7 +341,9 @@ def GR64 : RegisterClass<"X86", [i64], 64,
 // Segment registers for use by MOV instructions (and others) that have a
 //   segment register as one operand.  Always contain a 16-bit segment
 //   descriptor.
-def SEGMENT_REG : RegisterClass<"X86", [i16], 16, (add CS, DS, SS, ES, FS, GS)>;
+def SEGMENT_REG : RegisterClass<"X86", [i16], 16, (add CS, DS, SS, ES, FS, GS,
+                                                   // @LOCALMOD
+                                                   PSEUDO_NACL_SEG)>;
 
 // Debug registers.
 def DEBUG_REG : RegisterClass<"X86", [i32], 32, (sequence "DR%u", 0, 7)>;