Make FlushICache NOP for Nvidia Denver CPU's.

src/arm64/assembler-arm64.cc

Index: src/arm64/assembler-arm64.cc
diff --git a/src/arm64/assembler-arm64.cc b/src/arm64/assembler-arm64.cc
index 524be154c53bef81a410c3c648f456fc32f85bd3..97970a1cba20b6af5c3d717f0ebec9e07b34061e 100644
--- a/src/arm64/assembler-arm64.cc
+++ b/src/arm64/assembler-arm64.cc
@@ -46,6 +46,11 @@ namespace internal {
 void CpuFeatures::ProbeImpl(bool cross_compile) {
   // AArch64 has no configuration options, no further probing is required.
   supported_ = 0;

[JF, 2014/12/15 16:23:23]

The ARM and x64 version of this file also have:


  // Only use statically determined features for cross compile (snapshot).
  if (cross_compile) return;

Shoud this fie also do this?

[rmcilroy, 2014/12/15 16:32:02]

Yes you will need this here otherwise the snapshot might get generated wrongly.

[arajp, 2014/12/18 13:25:05]

Done.

+  // Probe for runtime features
+  base::CPU cpu;
+  if (cpu.implementer() == base::CPU::NVIDIA &&
+      cpu.variant() == base::CPU::NV_VARIANT_DENVER)
+    supported_ |= 1u << COHERENT_CACHE;

[Benedikt Meurer, 2014/12/15 05:33:36]

Nit: Add { and } for block.

[arajp, 2014/12/18 13:25:05]

Done.

 }