Make FlushICache NOP for Nvidia Denver CPU's.

src/base/cpu.cc

Index: src/base/cpu.cc
diff --git a/src/base/cpu.cc b/src/base/cpu.cc
index e188406f1a21ff72226b17c2332eb7ccd942dd49..0fcb2c08350964f63a5e87b34ed25b791dc02292 100644
--- a/src/base/cpu.cc
+++ b/src/base/cpu.cc
@@ -300,6 +300,7 @@ CPU::CPU()
       type_(0),
       implementer_(0),
       architecture_(0),
+      variant_(-1),

[Benedikt Meurer, 2014/12/15 05:33:36]

Can we default to 0 here instead?

[arajp, 2014/12/18 13:25:05]

Done.

       part_(0),
       has_fpu_(false),
       has_cmov_(false),
@@ -396,6 +397,16 @@ CPU::CPU()
     delete[] implementer;
   }
 
+  char* variant = cpu_info.ExtractField("CPU variant");
+  if (variant != NULL) {
+    char* end ;
+    variant_ = strtol(variant, &end, 0);
+    if (end == variant) {
+      variant_ = 0;

[JF, 2014/12/15 16:23:24]

The failure value here is 0, and as Benedikt pointed out above he'd like the
default to be 0.

Won't 0 be the same value as the "Denver" variant? It sounds like /proc/cpuinfo
identifies Denver as variant 0? What do other Tegra devices return as variant?

[arajp, 2014/12/18 13:25:05]

Yes. Denver is identified as 0 in variant.

Recently released Shield Tablet has 0x3 as variant which is a Tegra chip but
doesn't have a Denver CPU.

I changed the failure case to be -1.

+    }
+    delete[] variant;
+  }
+
   // Extract part number from the "CPU part" field.
   char* part = cpu_info.ExtractField("CPU part");
   if (part != NULL) {
@@ -548,6 +559,16 @@ CPU::CPU()
     delete[] implementer;
   }
 
+  char* variant = cpu_info.ExtractField("CPU variant");
+  if (variant != NULL) {
+    char* end ;
+    variant_ = strtol(variant, &end, 0);
+    if (end == variant) {
+      variant_ = 0;
+    }
+    delete[] variant;
+  }
+
   // Extract part number from the "CPU part" field.
   char* part = cpu_info.ExtractField("CPU part");
   if (part != NULL) {