enable packed double precision 3 operand mem/simd register avx1 instructions.

enable packed double precision 3 operand mem/simd register avx1 instructions.

All these instructions allow the forms:
op src1=xmm src2=xmm/mem src3=xmm
and
op src1=ymm src2=ymm/mem src3=ymm

The enabled instructions are:

'vaddpd', 'vaddsubpd', 'vandnpd', 'vandpd', 'vdivpd', 'vhaddpd',
'vhsubpd', 'vmaxpd', 'vminpd', 'vmulpd', 'vorpd', 'vsubpd', 'vunpckhpd',
'vunpcklpd', 'vxorpd'

BUG=https://code.google.com/p/nativeclient/issues/detail?id=1972
R=kschimpf@google.com

Committed: https://src.chromium.org/viewvc/native_client?view=rev&revision=14020

[shyamsundarr, 2014-11-03 18:30:01]

shyamsundarr@chromium.org changed reviewers:
+ kschimpf@google.com

[Karl, 2014-11-03 18:59:28]

lgtm

[shyamsundarr, 2014-11-03 20:32:44]

Committed patchset #1 (id:1) manually as 14020 (presubmit successful).