Revert GCC compilation fix on 3.1 branch that contained an invalid

src/x64/codegen-x64.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 8177 matching lines @@
     // a test rax instruction here.
     __ nop();
   } else {
     // Inline the inobject property case.
     Comment cmnt(masm(), "[ Inlined named property load");
     Result receiver = frame()->Pop();
     receiver.ToRegister();
     result = allocator()->Allocate();
     ASSERT(result.is_valid());
 
-    // r12 is now a reserved register, so it cannot be the receiver.
-    // If it was, the distance to the fixup location would not be constant.
-    ASSERT(!receiver.reg().is(r12));
+    // Cannot use r12 for receiver, because that changes
+    // the distance between a call and a fixup location,
+    // due to a special encoding of r12 as r/m in a ModR/M byte.
+    if (receiver.reg().is(r12)) {
+      frame()->Spill(receiver.reg());  // It will be overwritten with result.
+      // Swap receiver and value.
+      __ movq(result.reg(), receiver.reg());
+      Result temp = receiver;
+      receiver = result;
+      result = temp;
+    }
 
     DeferredReferenceGetNamedValue* deferred =
         new DeferredReferenceGetNamedValue(result.reg(), receiver.reg(), name);
 
     // Check that the receiver is a heap object.
     __ JumpIfSmi(receiver.reg(), deferred->entry_label());
 
     __ bind(deferred->patch_site());
     // This is the map check instruction that will be patched (so we can't
     // use the double underscore macro that may insert instructions).
@@ skipping 607 matching lines @@
 }
 
 #endif
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_X64